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authorJanne Grunau <j@jannau.net>2014-04-05 13:46:51 +0200
committerJanne Grunau <janne-libav@jannau.net>2014-04-06 21:18:49 +0200
commit8675bcb0addb1c7fb0b04682d1f3f95d5b8dae14 (patch)
treefe474c79b62cf470d15fd1ee0f7993d19bf98788
parenta027d2a8731f7c95dbb57be470160f0f94d6c97d (diff)
downloadffmpeg-8675bcb0addb1c7fb0b04682d1f3f95d5b8dae14.tar.gz
aarch64: add armv8 CPU flag
-rw-r--r--Makefile2
-rw-r--r--arch.mak1
-rwxr-xr-xconfigure3
-rw-r--r--libavutil/aarch64/cpu.c5
-rw-r--r--libavutil/aarch64/cpu.h1
-rw-r--r--libavutil/cpu.c2
-rw-r--r--libavutil/cpu.h1
7 files changed, 12 insertions, 3 deletions
diff --git a/Makefile b/Makefile
index 2453dfd996..b3680c2069 100644
--- a/Makefile
+++ b/Makefile
@@ -114,7 +114,7 @@ config.h: .config
SUBDIR_VARS := CLEANFILES EXAMPLES FFLIBS HOSTPROGS TESTPROGS TOOLS \
HEADERS ARCH_HEADERS BUILT_HEADERS SKIPHEADERS \
- ARMV5TE-OBJS ARMV6-OBJS VFP-OBJS NEON-OBJS \
+ ARMV5TE-OBJS ARMV6-OBJS ARMV8-OBJS VFP-OBJS NEON-OBJS \
ALTIVEC-OBJS MMX-OBJS YASM-OBJS \
OBJS HOSTOBJS TESTOBJS
diff --git a/arch.mak b/arch.mak
index b287fcecbe..4bfc883ffa 100644
--- a/arch.mak
+++ b/arch.mak
@@ -1,5 +1,6 @@
OBJS-$(HAVE_ARMV5TE) += $(ARMV5TE-OBJS) $(ARMV5TE-OBJS-yes)
OBJS-$(HAVE_ARMV6) += $(ARMV6-OBJS) $(ARMV6-OBJS-yes)
+OBJS-$(HAVE_ARMV8) += $(ARMV8-OBJS) $(ARMV8-OBJS-yes)
OBJS-$(HAVE_VFP) += $(VFP-OBJS) $(VFP-OBJS-yes)
OBJS-$(HAVE_NEON) += $(NEON-OBJS) $(NEON-OBJS-yes)
diff --git a/configure b/configure
index fdd6c2fbd3..4d005f1bbc 100755
--- a/configure
+++ b/configure
@@ -1271,6 +1271,7 @@ ARCH_EXT_LIST_ARM="
armv5te
armv6
armv6t2
+ armv8
neon
vfp
vfpv3
@@ -1615,6 +1616,7 @@ CMDLINE_APPEND="
armv5te_deps="arm"
armv6_deps="arm"
armv6t2_deps="arm"
+armv8_deps="aarch64"
neon_deps_any="aarch64 arm"
vfp_deps_any="aarch64 arm"
vfpv3_deps="vfp"
@@ -3697,6 +3699,7 @@ od -t x1 $TMPO | grep -q '42 *49 *47 *45' && enable bigendian
check_inline_asm inline_asm_labels '"1:\n"'
if enabled aarch64; then
+ enabled armv8 && check_insn armv8 'prfm pldl1strm, [x0]'
# internal assembler in clang 3.3 does not support this instruction
enabled neon && check_insn neon 'ext v0.8B, v0.8B, v1.8B, #1'
enabled vfp && check_insn vfp 'fmadd d0, d0, d1, d2'
diff --git a/libavutil/aarch64/cpu.c b/libavutil/aarch64/cpu.c
index 2cc2ccd9ef..37a7d8defa 100644
--- a/libavutil/aarch64/cpu.c
+++ b/libavutil/aarch64/cpu.c
@@ -22,6 +22,7 @@
int ff_get_cpu_flags_aarch64(void)
{
- return AV_CPU_FLAG_NEON * HAVE_NEON |
- AV_CPU_FLAG_VFP * HAVE_VFP;
+ return AV_CPU_FLAG_ARMV8 * HAVE_ARMV8 |
+ AV_CPU_FLAG_NEON * HAVE_NEON |
+ AV_CPU_FLAG_VFP * HAVE_VFP;
}
diff --git a/libavutil/aarch64/cpu.h b/libavutil/aarch64/cpu.h
index 704df48b85..f5b1d89132 100644
--- a/libavutil/aarch64/cpu.h
+++ b/libavutil/aarch64/cpu.h
@@ -23,6 +23,7 @@
#include "libavutil/cpu.h"
#include "libavutil/cpu_internal.h"
+#define have_armv8(flags) CPUEXT(flags, ARMV8)
#define have_neon(flags) CPUEXT(flags, NEON)
#define have_vfp(flags) CPUEXT(flags, VFP)
diff --git a/libavutil/cpu.c b/libavutil/cpu.c
index d651eb2089..e755d1551d 100644
--- a/libavutil/cpu.c
+++ b/libavutil/cpu.c
@@ -126,6 +126,7 @@ int av_parse_cpu_flags(const char *s)
{ "vfpv3", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFPV3 }, .unit = "flags" },
{ "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
#elif ARCH_AARCH64
+ { "armv8", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV8 }, .unit = "flags" },
{ "neon", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_NEON }, .unit = "flags" },
{ "vfp", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_VFP }, .unit = "flags" },
#endif
@@ -185,6 +186,7 @@ static const struct {
const char *name;
} cpu_flag_tab[] = {
#if ARCH_AARCH64
+ { AV_CPU_FLAG_ARMV8, "armv8" },
{ AV_CPU_FLAG_NEON, "neon" },
{ AV_CPU_FLAG_VFP, "vfp" },
#elif ARCH_ARM
diff --git a/libavutil/cpu.h b/libavutil/cpu.h
index 517c520119..7cecccc9c4 100644
--- a/libavutil/cpu.h
+++ b/libavutil/cpu.h
@@ -61,6 +61,7 @@
#define AV_CPU_FLAG_VFP (1 << 3)
#define AV_CPU_FLAG_VFPV3 (1 << 4)
#define AV_CPU_FLAG_NEON (1 << 5)
+#define AV_CPU_FLAG_ARMV8 (1 << 6)
/**
* Return the flags which specify extensions supported by the CPU.