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authorRémi Denis-Courmont <remi@remlab.net>2024-11-16 09:19:46 +0200
committerRémi Denis-Courmont <remi@remlab.net>2024-11-17 11:28:21 +0200
commit55aa81d5ccb92a2f41d6aefc5457bfc1c856c02d (patch)
treea2609ce3918c1ce8c1376d6dcf2f0dd71550a352
parent42dd1f1cf13d02381c10461a7bcfcddc63ad211d (diff)
downloadffmpeg-55aa81d5ccb92a2f41d6aefc5457bfc1c856c02d.tar.gz
checkasm: add RISC-V vector width to arch info
-rw-r--r--tests/checkasm/checkasm.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c
index fb307af0ae..f30c53cec2 100644
--- a/tests/checkasm/checkasm.c
+++ b/tests/checkasm/checkasm.c
@@ -96,6 +96,8 @@
#if ARCH_AARCH64
#include "libavutil/aarch64/cpu.h"
+#elif ARCH_RISCV
+#include "libavutil/riscv/cpu.h"
#endif
#if ARCH_ARM && HAVE_ARMV5TE_EXTERNAL
@@ -993,6 +995,10 @@ int main(int argc, char *argv[])
if (have_sve(av_get_cpu_flags()))
snprintf(arch_info_buf, sizeof(arch_info_buf),
"SVE %d bits, ", 8 * ff_aarch64_sve_length());
+#elif ARCH_RISCV && HAVE_RVV
+ if (av_get_cpu_flags() & AV_CPU_FLAG_RVV_I32)
+ snprintf(arch_info_buf, sizeof (arch_info_buf),
+ "%zu-bit vectors, ", 8 * ff_get_rv_vlenb());
#endif
fprintf(stderr, "checkasm: %susing random seed %u\n", arch_info_buf, seed);
av_lfg_init(&checkasm_lfg, seed);