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authorRémi Denis-Courmont <remi@remlab.net>2024-07-22 20:24:30 +0300
committerRémi Denis-Courmont <remi@remlab.net>2024-07-25 18:55:48 +0300
commit529d4230123dbb33a719a4d5ec7e47567f04cd06 (patch)
tree4cbb60fcf2608ee9d3c6253a10eee5757756015a
parent5f10173fa173f27405d4700522fea2b59fa82416 (diff)
downloadffmpeg-529d4230123dbb33a719a4d5ec7e47567f04cd06.tar.gz
lavu/riscv: remove bespoke SH{1,2,3}ADD assembler
configure checks that the assembler supports the B extension (or rather its constituents) anyway. These macros were dodging sanity checks for unsupported instructions and nothing else.
-rw-r--r--libavutil/riscv/asm.S19
1 files changed, 0 insertions, 19 deletions
diff --git a/libavutil/riscv/asm.S b/libavutil/riscv/asm.S
index 0c29680d84..8b96e07b75 100644
--- a/libavutil/riscv/asm.S
+++ b/libavutil/riscv/asm.S
@@ -83,25 +83,6 @@
.endm
.endm
-#if !defined (__riscv_zba)
- /* SH{1,2,3}ADD definitions for pre-Zba assemblers */
- .macro shnadd n, rd, rs1, rs2
- .insn r OP, 2 * \n, 16, \rd, \rs1, \rs2
- .endm
-
- .macro sh1add rd, rs1, rs2
- shnadd 1, \rd, \rs1, \rs2
- .endm
-
- .macro sh2add rd, rs1, rs2
- shnadd 2, \rd, \rs1, \rs2
- .endm
-
- .macro sh3add rd, rs1, rs2
- shnadd 3, \rd, \rs1, \rs2
- .endm
-#endif
-
#if defined (__riscv_v_elen)
# define RV_V_ELEN __riscv_v_elen
#else