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| author | Anton Samokhvalov <pg83@yandex.ru> | 2022-02-10 16:45:15 +0300 |
|---|---|---|
| committer | Daniil Cherednik <dcherednik@yandex-team.ru> | 2022-02-10 16:45:15 +0300 |
| commit | 72cb13b4aff9bc9cf22e49251bc8fd143f82538f (patch) | |
| tree | da2c34829458c7d4e74bdfbdf85dff449e9e7fb8 /util/system/cpu_id.h | |
| parent | 778e51ba091dc39e7b7fcab2b9cf4dbedfb6f2b5 (diff) | |
| download | ydb-72cb13b4aff9bc9cf22e49251bc8fd143f82538f.tar.gz | |
Restoring authorship annotation for Anton Samokhvalov <pg83@yandex.ru>. Commit 1 of 2.
Diffstat (limited to 'util/system/cpu_id.h')
| -rw-r--r-- | util/system/cpu_id.h | 208 |
1 files changed, 104 insertions, 104 deletions
diff --git a/util/system/cpu_id.h b/util/system/cpu_id.h index 3c49e728a7..75637d68b7 100644 --- a/util/system/cpu_id.h +++ b/util/system/cpu_id.h @@ -1,154 +1,154 @@ -#pragma once - -#include "types.h" +#pragma once + +#include "types.h" #include "compiler.h" #include <util/generic/singleton.h> - -#define Y_CPU_ID_ENUMERATE(F) \ - F(SSE) \ - F(SSE2) \ - F(SSE3) \ - F(SSSE3) \ - F(SSE41) \ - F(SSE42) \ + +#define Y_CPU_ID_ENUMERATE(F) \ + F(SSE) \ + F(SSE2) \ + F(SSE3) \ + F(SSSE3) \ + F(SSE41) \ + F(SSE42) \ F(F16C) \ - F(POPCNT) \ - F(BMI1) \ + F(POPCNT) \ + F(BMI1) \ F(BMI2) \ F(PCLMUL) \ - F(AES) \ - F(AVX) \ - F(FMA) \ - F(AVX2) \ - F(AVX512F) \ - F(AVX512DQ) \ - F(AVX512IFMA) \ - F(AVX512PF) \ - F(AVX512ER) \ - F(AVX512CD) \ - F(AVX512BW) \ - F(AVX512VL) \ - F(AVX512VBMI) \ - F(PREFETCHWT1) \ - F(SHA) \ - F(ADX) \ - F(RDRAND) \ - F(RDSEED) \ - F(PCOMMIT) \ - F(RDTSCP) \ - F(CLFLUSHOPT) \ - F(CLWB) \ - F(XSAVE) \ - F(OSXSAVE) - + F(AES) \ + F(AVX) \ + F(FMA) \ + F(AVX2) \ + F(AVX512F) \ + F(AVX512DQ) \ + F(AVX512IFMA) \ + F(AVX512PF) \ + F(AVX512ER) \ + F(AVX512CD) \ + F(AVX512BW) \ + F(AVX512VL) \ + F(AVX512VBMI) \ + F(PREFETCHWT1) \ + F(SHA) \ + F(ADX) \ + F(RDRAND) \ + F(RDSEED) \ + F(PCOMMIT) \ + F(RDTSCP) \ + F(CLFLUSHOPT) \ + F(CLWB) \ + F(XSAVE) \ + F(OSXSAVE) + #define Y_CPU_ID_ENUMERATE_OUTLINED_CACHED_DEFINE(F) \ - F(F16C) \ - F(BMI1) \ - F(BMI2) \ - F(PCLMUL) \ - F(AES) \ - F(AVX) \ - F(FMA) \ - F(AVX2) \ - F(AVX512F) \ - F(AVX512DQ) \ - F(AVX512IFMA) \ - F(AVX512PF) \ - F(AVX512ER) \ - F(AVX512CD) \ - F(AVX512BW) \ - F(AVX512VL) \ - F(AVX512VBMI) \ - F(PREFETCHWT1) \ - F(SHA) \ - F(ADX) \ - F(RDRAND) \ - F(RDSEED) \ - F(PCOMMIT) \ - F(RDTSCP) \ - F(CLFLUSHOPT) \ - F(CLWB) \ - F(XSAVE) \ + F(F16C) \ + F(BMI1) \ + F(BMI2) \ + F(PCLMUL) \ + F(AES) \ + F(AVX) \ + F(FMA) \ + F(AVX2) \ + F(AVX512F) \ + F(AVX512DQ) \ + F(AVX512IFMA) \ + F(AVX512PF) \ + F(AVX512ER) \ + F(AVX512CD) \ + F(AVX512BW) \ + F(AVX512VL) \ + F(AVX512VBMI) \ + F(PREFETCHWT1) \ + F(SHA) \ + F(ADX) \ + F(RDRAND) \ + F(RDSEED) \ + F(PCOMMIT) \ + F(RDTSCP) \ + F(CLFLUSHOPT) \ + F(CLWB) \ + F(XSAVE) \ F(OSXSAVE) -namespace NX86 { - /** - * returns false on non-x86 platforms - */ +namespace NX86 { + /** + * returns false on non-x86 platforms + */ bool CpuId(ui32 op, ui32 res[4]) noexcept; bool CpuId(ui32 op, ui32 subOp, ui32 res[4]) noexcept; #define Y_DEF_NAME(X) Y_CONST_FUNCTION bool Have##X() noexcept; - Y_CPU_ID_ENUMERATE(Y_DEF_NAME) -#undef Y_DEF_NAME + Y_CPU_ID_ENUMERATE(Y_DEF_NAME) +#undef Y_DEF_NAME #define Y_DEF_NAME(X) Y_CONST_FUNCTION bool CachedHave##X() noexcept; Y_CPU_ID_ENUMERATE_OUTLINED_CACHED_DEFINE(Y_DEF_NAME) #undef Y_DEF_NAME - struct TFlagsCache { + struct TFlagsCache { #define Y_DEF_NAME(X) const bool Have##X##_ = NX86::Have##X(); - Y_CPU_ID_ENUMERATE(Y_DEF_NAME) -#undef Y_DEF_NAME - }; + Y_CPU_ID_ENUMERATE(Y_DEF_NAME) +#undef Y_DEF_NAME + }; #define Y_LOOKUP_CPU_ID_IMPL(X) return SingletonWithPriority<TFlagsCache, 0>()->Have##X##_; - inline bool CachedHaveSSE() noexcept { + inline bool CachedHaveSSE() noexcept { #ifdef _sse_ - return true; + return true; #else - Y_LOOKUP_CPU_ID_IMPL(SSE) + Y_LOOKUP_CPU_ID_IMPL(SSE) #endif - } - - inline bool CachedHaveSSE2() noexcept { + } + + inline bool CachedHaveSSE2() noexcept { #ifdef _sse2_ - return true; + return true; #else - Y_LOOKUP_CPU_ID_IMPL(SSE2) + Y_LOOKUP_CPU_ID_IMPL(SSE2) #endif - } + } - inline bool CachedHaveSSE3() noexcept { + inline bool CachedHaveSSE3() noexcept { #ifdef _sse3_ - return true; + return true; #else - Y_LOOKUP_CPU_ID_IMPL(SSE3) + Y_LOOKUP_CPU_ID_IMPL(SSE3) #endif - } + } - inline bool CachedHaveSSSE3() noexcept { + inline bool CachedHaveSSSE3() noexcept { #ifdef _ssse3_ - return true; + return true; #else - Y_LOOKUP_CPU_ID_IMPL(SSSE3) + Y_LOOKUP_CPU_ID_IMPL(SSSE3) #endif - } + } - inline bool CachedHaveSSE41() noexcept { + inline bool CachedHaveSSE41() noexcept { #ifdef _sse4_1_ - return true; + return true; #else - Y_LOOKUP_CPU_ID_IMPL(SSE41) + Y_LOOKUP_CPU_ID_IMPL(SSE41) #endif - } + } - inline bool CachedHaveSSE42() noexcept { + inline bool CachedHaveSSE42() noexcept { #ifdef _sse4_2_ - return true; + return true; #else - Y_LOOKUP_CPU_ID_IMPL(SSE42) + Y_LOOKUP_CPU_ID_IMPL(SSE42) #endif - } + } - inline bool CachedHavePOPCNT() noexcept { + inline bool CachedHavePOPCNT() noexcept { #ifdef _popcnt_ - return true; + return true; #else - Y_LOOKUP_CPU_ID_IMPL(POPCNT) + Y_LOOKUP_CPU_ID_IMPL(POPCNT) #endif - } + } #undef Y_LOOKUP_CPU_ID_IMPL |