intermediate changes

ref:ca7a95e8c9a9d780f96497136a152091d54e61b5

89 files changed, 0 insertions, 9022 deletions

diff --git a/contrib/libs/llvm12/include/ya.make b/contrib/libs/llvm12/include/ya.make
deleted file mode 100644
index 649c0e4a89b..00000000000
--- a/contrib/libs/llvm12/include/ya.make
+++ /dev/null
@@ -1,3969 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-PROVIDES(llvm)
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(
-    Apache-2.0 WITH LLVM-exception AND
-    BSD-2-Clause AND
-    NCSA AND
-    Public-Domain AND
-    Unicode-Mappings
-)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-)
-
-NO_UTIL()
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen --gen-directive-decl -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/Frontend/OpenACC -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/Frontend/OpenACC/ACC.td --write-if-changed -o
-        llvm/Frontend/OpenACC/ACC.h.inc -d llvm/Frontend/OpenACC/ACC.h.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/Frontend/Directive/DirectiveBase.td llvm/Frontend/OpenACC/ACC.td
-    OUTPUT_INCLUDES llvm/ADT/BitmaskEnum.h
-    OUT_NOAUTO llvm/Frontend/OpenACC/ACC.h.inc llvm/Frontend/OpenACC/ACC.h.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen --gen-directive-decl -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/Frontend/OpenMP -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/Frontend/OpenMP/OMP.td --write-if-changed -o
-        llvm/Frontend/OpenMP/OMP.h.inc -d llvm/Frontend/OpenMP/OMP.h.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/Frontend/Directive/DirectiveBase.td llvm/Frontend/OpenMP/OMP.td
-    OUTPUT_INCLUDES llvm/ADT/BitmaskEnum.h
-    OUT_NOAUTO llvm/Frontend/OpenMP/OMP.h.inc llvm/Frontend/OpenMP/OMP.h.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-attrs -I ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Attributes.td --write-if-changed -o
-        llvm/IR/Attributes.inc -d llvm/IR/Attributes.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/IR/Attributes.td
-    OUT_NOAUTO llvm/IR/Attributes.inc llvm/IR/Attributes.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicEnums.inc -d llvm/IR/IntrinsicEnums.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicEnums.inc llvm/IR/IntrinsicEnums.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-impl -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicImpl.inc -d llvm/IR/IntrinsicImpl.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicImpl.inc llvm/IR/IntrinsicImpl.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=aarch64 -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicsAArch64.h -d llvm/IR/IntrinsicsAArch64.h.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicsAArch64.h llvm/IR/IntrinsicsAArch64.h.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=amdgcn -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicsAMDGPU.h -d llvm/IR/IntrinsicsAMDGPU.h.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicsAMDGPU.h llvm/IR/IntrinsicsAMDGPU.h.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=arm -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicsARM.h -d llvm/IR/IntrinsicsARM.h.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicsARM.h llvm/IR/IntrinsicsARM.h.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=bpf -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicsBPF.h -d llvm/IR/IntrinsicsBPF.h.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicsBPF.h llvm/IR/IntrinsicsBPF.h.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=hexagon -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicsHexagon.h -d llvm/IR/IntrinsicsHexagon.h.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicsHexagon.h llvm/IR/IntrinsicsHexagon.h.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=mips -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicsMips.h -d llvm/IR/IntrinsicsMips.h.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicsMips.h llvm/IR/IntrinsicsMips.h.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=nvvm -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicsNVPTX.h -d llvm/IR/IntrinsicsNVPTX.h.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicsNVPTX.h llvm/IR/IntrinsicsNVPTX.h.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=ppc -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicsPowerPC.h -d llvm/IR/IntrinsicsPowerPC.h.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicsPowerPC.h llvm/IR/IntrinsicsPowerPC.h.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=r600 -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicsR600.h -d llvm/IR/IntrinsicsR600.h.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicsR600.h llvm/IR/IntrinsicsR600.h.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=riscv -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicsRISCV.h -d llvm/IR/IntrinsicsRISCV.h.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicsRISCV.h llvm/IR/IntrinsicsRISCV.h.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=s390 -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicsS390.h -d llvm/IR/IntrinsicsS390.h.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicsS390.h llvm/IR/IntrinsicsS390.h.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=ve -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicsVE.h -d llvm/IR/IntrinsicsVE.h.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicsVE.h llvm/IR/IntrinsicsVE.h.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=wasm -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicsWebAssembly.h -d llvm/IR/IntrinsicsWebAssembly.h.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicsWebAssembly.h llvm/IR/IntrinsicsWebAssembly.h.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=x86 -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicsX86.h -d llvm/IR/IntrinsicsX86.h.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicsX86.h llvm/IR/IntrinsicsX86.h.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-intrinsic-enums -intrinsic-prefix=xcore -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/include/llvm/IR -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/IR/Intrinsics.td --write-if-changed -o
-        llvm/IR/IntrinsicsXCore.h -d llvm/IR/IntrinsicsXCore.h.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/CodeGen/SDNodeProperties.td llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td
-        llvm/IR/IntrinsicsAArch64.td llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td
-        llvm/IR/IntrinsicsBPF.td llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td
-        llvm/IR/IntrinsicsMips.td llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td
-        llvm/IR/IntrinsicsRISCV.td llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td
-        llvm/IR/IntrinsicsVEVL.gen.td llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td
-        llvm/IR/IntrinsicsXCore.td
-    OUT_NOAUTO llvm/IR/IntrinsicsXCore.h llvm/IR/IntrinsicsXCore.h.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen --gen-directive-impl -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenACC -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/Frontend/OpenACC/ACC.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenACC/ACC.cpp -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenACC/ACC.cpp.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/Frontend/Directive/DirectiveBase.td llvm/Frontend/OpenACC/ACC.td
-    OUTPUT_INCLUDES llvm/ADT/StringRef.h llvm/ADT/StringSwitch.h llvm/Frontend/OpenACC/ACC.h.inc
-        llvm/Support/ErrorHandling.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenACC/ACC.cpp
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenACC/ACC.cpp.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen --gen-directive-impl -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenMP -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include llvm/Frontend/OpenMP/OMP.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenMP/OMP.cpp -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenMP/OMP.cpp.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN llvm/Frontend/Directive/DirectiveBase.td llvm/Frontend/OpenMP/OMP.td
-    OUTPUT_INCLUDES llvm/ADT/StringRef.h llvm/ADT/StringSwitch.h llvm/Frontend/OpenMP/OMP.h.inc
-        llvm/Support/ErrorHandling.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenMP/OMP.cpp
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Frontend/OpenMP/OMP.cpp.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-asm-matcher -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmMatcher.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmMatcher.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/Support/Debug.h llvm/Support/Format.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmMatcher.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmMatcher.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -asmwriternum=1 -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter1.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter1.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter1.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenAsmWriter1.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-callingconv -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenCallingConv.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenCallingConv.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenCallingConv.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenCallingConv.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-dag-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target -omit-comments
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDAGISel.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDAGISel.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDAGISel.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDAGISel.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-disassembler -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDisassemblerTables.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDisassemblerTables.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES assert.h llvm/MC/MCInst.h llvm/Support/DataTypes.h llvm/Support/Debug.h
-        llvm/Support/LEB128.h llvm/Support/raw_ostream.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDisassemblerTables.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenDisassemblerTables.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-exegesis -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenExegesis.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenExegesis.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenExegesis.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenExegesis.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-fast-isel -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenFastISel.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenFastISel.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenFastISel.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenFastISel.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-global-isel -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenGlobalISel.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenGlobalISel.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenGlobalISel.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenGlobalISel.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-instr-info -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenInstrInfo.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenInstrInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenInstrInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenInstrInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-emitter -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES _llvm_sstream.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCCodeEmitter.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-pseudo-lowering -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCPseudoLowering.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCPseudoLowering.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCPseudoLowering.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenMCPseudoLowering.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-global-isel-combiner -combiners=AArch64PostLegalizerCombinerHelper
-        -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGICombiner.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGICombiner.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/ADT/SparseBitVector.h
-    OUT_NOAUTO
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGICombiner.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGICombiner.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-global-isel-combiner -combiners=AArch64PostLegalizerLoweringHelper
-        -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGILowering.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGILowering.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/ADT/SparseBitVector.h
-    OUT_NOAUTO
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGILowering.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPostLegalizeGILowering.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-global-isel-combiner -combiners=AArch64PreLegalizerCombinerHelper
-        -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPreLegalizeGICombiner.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPreLegalizeGICombiner.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/ADT/SparseBitVector.h
-    OUT_NOAUTO
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPreLegalizeGICombiner.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenPreLegalizeGICombiner.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-register-bank -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterBank.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterBank.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterBank.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterBank.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-register-info -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterInfo.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/CodeGen/TargetRegisterInfo.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenRegisterInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-subtarget -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSubtargetInfo.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSubtargetInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/CodeGen/TargetSchedule.h llvm/Support/Debug.h llvm/Support/raw_ostream.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSubtargetInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSubtargetInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-searchable-tables -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/AArch64 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSystemOperands.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSystemOperands.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/AArch64/AArch64.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64CallingConvention.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Combine.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrAtomics.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrFormats.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrGISel.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64InstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64PfmCounters.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SVEInstrInfo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA53.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA55.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedA64FX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedCyclone.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM3.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM4.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedExynosM5.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkor.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedFalkorDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryo.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedKryoDetails.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredExynos.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedTSV110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX2T99.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SchedThunderX3T110.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64Schedule.td
-        contrib/libs/llvm12/lib/Target/AArch64/AArch64SystemOperands.td
-        contrib/libs/llvm12/lib/Target/AArch64/SVEInstrFormats.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/Combine.td
-        llvm/Target/GlobalISel/RegisterBank.td llvm/Target/GlobalISel/SelectionDAGCompat.td
-        llvm/Target/GlobalISel/Target.td llvm/Target/Target.td llvm/Target/TargetCallingConv.td
-        llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td llvm/Target/TargetPfmCounters.td
-        llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSystemOperands.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64/AArch64GenSystemOperands.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-asm-matcher -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmMatcher.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmMatcher.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/Support/Debug.h llvm/Support/Format.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmMatcher.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmMatcher.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmWriter.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmWriter.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmWriter.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenAsmWriter.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-callingconv -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenCallingConv.inc
-        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenCallingConv.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenCallingConv.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenCallingConv.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-dag-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target -omit-comments
-        contrib/libs/llvm12/lib/Target/ARM/ARM.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDAGISel.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDAGISel.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDAGISel.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDAGISel.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-disassembler -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
-        --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDisassemblerTables.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDisassemblerTables.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES assert.h llvm/MC/MCInst.h llvm/Support/DataTypes.h llvm/Support/Debug.h
-        llvm/Support/LEB128.h llvm/Support/raw_ostream.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDisassemblerTables.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenDisassemblerTables.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-fast-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenFastISel.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenFastISel.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenFastISel.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenFastISel.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-global-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenGlobalISel.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenGlobalISel.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenGlobalISel.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenGlobalISel.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-instr-info -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenInstrInfo.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenInstrInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenInstrInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenInstrInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-emitter -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCCodeEmitter.inc
-        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCCodeEmitter.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES _llvm_sstream.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCCodeEmitter.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCCodeEmitter.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-pseudo-lowering -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/ARM/ARM.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCPseudoLowering.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCPseudoLowering.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCPseudoLowering.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenMCPseudoLowering.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-register-bank -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/ARM/ARM.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterBank.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterBank.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterBank.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterBank.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-register-info -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/ARM/ARM.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterInfo.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/CodeGen/TargetRegisterInfo.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenRegisterInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-subtarget -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/ARM/ARM.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSubtargetInfo.inc
-        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSubtargetInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/CodeGen/TargetSchedule.h llvm/Support/Debug.h llvm/Support/raw_ostream.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSubtargetInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSubtargetInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-searchable-tables -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/ARM -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/ARM/ARM.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSystemRegister.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSystemRegister.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/ARM/ARM.td contrib/libs/llvm12/lib/Target/ARM/ARMCallingConv.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrCDE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrFormats.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrInfo.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrMVE.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrNEON.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMInstrThumb2.td contrib/libs/llvm12/lib/Target/ARM/ARMInstrVFP.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMPredicates.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSchedule.td contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA57WriteRes.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA8.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleA9.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM4.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleM7.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleR52.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleSwift.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMScheduleV6.td
-        contrib/libs/llvm12/lib/Target/ARM/ARMSystemRegister.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/TableGen/SearchableTable.td llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSystemRegister.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM/ARMGenSystemRegister.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-asm-matcher -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/BPF/BPF.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmMatcher.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmMatcher.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/Support/Debug.h llvm/Support/Format.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmMatcher.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmMatcher.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/BPF/BPF.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmWriter.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmWriter.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmWriter.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenAsmWriter.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-callingconv -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/BPF/BPF.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenCallingConv.inc
-        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenCallingConv.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenCallingConv.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenCallingConv.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-dag-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target -omit-comments
-        contrib/libs/llvm12/lib/Target/BPF/BPF.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDAGISel.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDAGISel.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDAGISel.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDAGISel.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-disassembler -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/BPF/BPF.td
-        --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDisassemblerTables.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDisassemblerTables.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES assert.h llvm/MC/MCInst.h llvm/Support/DataTypes.h llvm/Support/Debug.h
-        llvm/Support/LEB128.h llvm/Support/raw_ostream.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDisassemblerTables.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenDisassemblerTables.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-instr-info -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/BPF/BPF.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenInstrInfo.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenInstrInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenInstrInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenInstrInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-emitter -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/BPF/BPF.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenMCCodeEmitter.inc
-        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenMCCodeEmitter.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES _llvm_sstream.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenMCCodeEmitter.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenMCCodeEmitter.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-register-info -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/BPF/BPF.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenRegisterInfo.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenRegisterInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/CodeGen/TargetRegisterInfo.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenRegisterInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenRegisterInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-subtarget -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/BPF
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/BPF/BPF.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenSubtargetInfo.inc
-        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenSubtargetInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/BPF/BPF.td contrib/libs/llvm12/lib/Target/BPF/BPFCallingConv.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrFormats.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFInstrInfo.td
-        contrib/libs/llvm12/lib/Target/BPF/BPFRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/CodeGen/TargetSchedule.h llvm/Support/Debug.h llvm/Support/raw_ostream.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenSubtargetInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF/BPFGenSubtargetInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenAsmWriter.inc
-        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenAsmWriter.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrFormats.td
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrInfo.td
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXIntrinsics.td
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenAsmWriter.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenAsmWriter.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-dag-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target -omit-comments
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenDAGISel.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenDAGISel.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrFormats.td
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrInfo.td
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXIntrinsics.td
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenDAGISel.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenDAGISel.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-instr-info -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenInstrInfo.inc
-        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenInstrInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrFormats.td
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrInfo.td
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXIntrinsics.td
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenInstrInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenInstrInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-register-info -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenRegisterInfo.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenRegisterInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrFormats.td
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrInfo.td
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXIntrinsics.td
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/CodeGen/TargetRegisterInfo.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenRegisterInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenRegisterInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-subtarget -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td
-        --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenSubtargetInfo.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenSubtargetInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/NVPTX/NVPTX.td contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrFormats.td
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXInstrInfo.td
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXIntrinsics.td
-        contrib/libs/llvm12/lib/Target/NVPTX/NVPTXRegisterInfo.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/CodeGen/TargetSchedule.h llvm/Support/Debug.h llvm/Support/raw_ostream.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenSubtargetInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX/NVPTXGenSubtargetInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-asm-matcher -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmMatcher.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmMatcher.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/Support/Debug.h llvm/Support/Format.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmMatcher.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmMatcher.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmWriter.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmWriter.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmWriter.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenAsmWriter.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-callingconv -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenCallingConv.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenCallingConv.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenCallingConv.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenCallingConv.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-dag-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target -omit-comments
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDAGISel.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDAGISel.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDAGISel.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDAGISel.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-disassembler -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDisassemblerTables.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDisassemblerTables.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES assert.h llvm/MC/MCInst.h llvm/Support/DataTypes.h llvm/Support/Debug.h
-        llvm/Support/LEB128.h llvm/Support/raw_ostream.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDisassemblerTables.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenDisassemblerTables.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-exegesis -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/PowerPC/PPC.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenExegesis.inc
-        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenExegesis.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenExegesis.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenExegesis.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-fast-isel -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenFastISel.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenFastISel.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenFastISel.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenFastISel.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-global-isel -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenGlobalISel.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenGlobalISel.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenGlobalISel.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenGlobalISel.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-instr-info -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenInstrInfo.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenInstrInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenInstrInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenInstrInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-emitter -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/PowerPC/PPC.td
-        --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenMCCodeEmitter.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenMCCodeEmitter.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES _llvm_sstream.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenMCCodeEmitter.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenMCCodeEmitter.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-register-bank -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterBank.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterBank.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterBank.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterBank.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-register-info -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterInfo.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/CodeGen/TargetRegisterInfo.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenRegisterInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-subtarget -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenSubtargetInfo.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenSubtargetInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/PowerPC/GISel/PPCRegisterBanks.td
-        contrib/libs/llvm12/lib/Target/PowerPC/P9InstrResources.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPC.td contrib/libs/llvm12/lib/Target/PowerPC/PPCCallingConv.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstr64Bit.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrAltivec.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrFormats.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrHTM.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrPrefix.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrSPE.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCInstrVSX.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCPfmCounters.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCRegisterInfo.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCSchedule440.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleA2.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE500mc.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleE5500.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG3.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG4Plus.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleG5.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP7.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP8.td
-        contrib/libs/llvm12/lib/Target/PowerPC/PPCScheduleP9.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/CodeGen/TargetSchedule.h llvm/Support/Debug.h llvm/Support/raw_ostream.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenSubtargetInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC/PPCGenSubtargetInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-asm-matcher -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmMatcher.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmMatcher.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
-        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
-        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/Support/Debug.h llvm/Support/Format.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmMatcher.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmMatcher.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
-        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
-        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-asm-writer -asmwriternum=1 -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/X86/X86.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter1.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter1.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
-        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
-        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter1.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenAsmWriter1.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-callingconv -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenCallingConv.inc
-        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenCallingConv.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
-        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
-        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenCallingConv.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenCallingConv.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-dag-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target -omit-comments
-        contrib/libs/llvm12/lib/Target/X86/X86.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDAGISel.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDAGISel.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
-        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
-        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDAGISel.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDAGISel.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-disassembler -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
-        --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDisassemblerTables.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDisassemblerTables.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
-        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
-        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDisassemblerTables.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenDisassemblerTables.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-x86-EVEX2VEX-tables -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/X86/X86.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenEVEX2VEXTables.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenEVEX2VEXTables.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
-        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
-        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenEVEX2VEXTables.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenEVEX2VEXTables.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-exegesis -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenExegesis.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenExegesis.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
-        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
-        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenExegesis.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenExegesis.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-fast-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenFastISel.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenFastISel.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
-        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
-        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenFastISel.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenFastISel.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-global-isel -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenGlobalISel.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenGlobalISel.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
-        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
-        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenGlobalISel.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenGlobalISel.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-instr-info -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenInstrInfo.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenInstrInfo.inc.d
-        --long-string-literals=0
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
-        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
-        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenInstrInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenInstrInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-register-bank -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/X86/X86.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterBank.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterBank.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
-        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
-        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterBank.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterBank.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-register-info -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86 -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target
-        contrib/libs/llvm12/lib/Target/X86/X86.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterInfo.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
-        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
-        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/CodeGen/TargetRegisterInfo.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenRegisterInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-subtarget -I ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target/X86
-        -Iinclude -I${ARCADIA_ROOT}/contrib/libs/llvm12/include -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/Target contrib/libs/llvm12/lib/Target/X86/X86.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenSubtargetInfo.inc
-        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenSubtargetInfo.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/Target/X86/X86.td contrib/libs/llvm12/lib/Target/X86/X86CallingConv.td
-        contrib/libs/llvm12/lib/Target/X86/X86Instr3DNow.td contrib/libs/llvm12/lib/Target/X86/X86InstrAMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrAVX512.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrArithmetic.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCMovSetCC.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrControl.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrExtension.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFMA.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFPStack.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFormats.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrInfo.td contrib/libs/llvm12/lib/Target/X86/X86InstrKL.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrMMX.td contrib/libs/llvm12/lib/Target/X86/X86InstrMPX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSGX.td contrib/libs/llvm12/lib/Target/X86/X86InstrSNP.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSSE.td contrib/libs/llvm12/lib/Target/X86/X86InstrSVM.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrShiftRotate.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrSystem.td contrib/libs/llvm12/lib/Target/X86/X86InstrTDX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrTSX.td contrib/libs/llvm12/lib/Target/X86/X86InstrVMX.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrVecCompiler.td
-        contrib/libs/llvm12/lib/Target/X86/X86InstrXOP.td contrib/libs/llvm12/lib/Target/X86/X86PfmCounters.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterBanks.td
-        contrib/libs/llvm12/lib/Target/X86/X86RegisterInfo.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedBroadwell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedHaswell.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedPredicates.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSandyBridge.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeClient.td
-        contrib/libs/llvm12/lib/Target/X86/X86SchedSkylakeServer.td
-        contrib/libs/llvm12/lib/Target/X86/X86Schedule.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleAtom.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBdVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleBtVer2.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleSLM.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver1.td
-        contrib/libs/llvm12/lib/Target/X86/X86ScheduleZnver2.td llvm/CodeGen/SDNodeProperties.td
-        llvm/CodeGen/ValueTypes.td llvm/IR/Intrinsics.td llvm/IR/IntrinsicsAArch64.td
-        llvm/IR/IntrinsicsAMDGPU.td llvm/IR/IntrinsicsARM.td llvm/IR/IntrinsicsBPF.td
-        llvm/IR/IntrinsicsHexagon.td llvm/IR/IntrinsicsHexagonDep.td llvm/IR/IntrinsicsMips.td
-        llvm/IR/IntrinsicsNVVM.td llvm/IR/IntrinsicsPowerPC.td llvm/IR/IntrinsicsRISCV.td
-        llvm/IR/IntrinsicsSystemZ.td llvm/IR/IntrinsicsVE.td llvm/IR/IntrinsicsVEVL.gen.td
-        llvm/IR/IntrinsicsWebAssembly.td llvm/IR/IntrinsicsX86.td llvm/IR/IntrinsicsXCore.td
-        llvm/Target/GenericOpcodes.td llvm/Target/GlobalISel/RegisterBank.td
-        llvm/Target/GlobalISel/SelectionDAGCompat.td llvm/Target/GlobalISel/Target.td llvm/Target/Target.td
-        llvm/Target/TargetCallingConv.td llvm/Target/TargetInstrPredicate.td llvm/Target/TargetItinerary.td
-        llvm/Target/TargetPfmCounters.td llvm/Target/TargetSchedule.td llvm/Target/TargetSelectionDAG.td
-    OUTPUT_INCLUDES llvm/CodeGen/TargetSchedule.h llvm/Support/Debug.h llvm/Support/raw_ostream.h
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenSubtargetInfo.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86/X86GenSubtargetInfo.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include
-        contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/Options.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/Options.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/Options.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/Options.td llvm/Option/OptParser.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/Options.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/Options.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/Options.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/Options.inc
-        -d ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/Options.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/Options.td llvm/Option/OptParser.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/Options.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/Options.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/dsymutil -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/dsymutil/Options.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/dsymutil/Options.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/dsymutil/Options.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/tools/dsymutil/Options.td llvm/Option/OptParser.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/dsymutil/Options.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/dsymutil/Options.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-cvtres -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-cvtres/Opts.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-cvtres/Opts.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-cvtres/Opts.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/tools/llvm-cvtres/Opts.td llvm/Option/OptParser.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-cvtres/Opts.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-cvtres/Opts.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-lipo -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-lipo/LipoOpts.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-lipo/LipoOpts.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-lipo/LipoOpts.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/tools/llvm-lipo/LipoOpts.td llvm/Option/OptParser.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-lipo/LipoOpts.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-lipo/LipoOpts.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-ml -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-ml/Opts.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-ml/Opts.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-ml/Opts.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/tools/llvm-ml/Opts.td llvm/Option/OptParser.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-ml/Opts.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-ml/Opts.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-mt -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-mt/Opts.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-mt/Opts.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-mt/Opts.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/tools/llvm-mt/Opts.td llvm/Option/OptParser.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-mt/Opts.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-mt/Opts.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include
-        contrib/libs/llvm12/tools/llvm-objcopy/BitcodeStripOpts.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/BitcodeStripOpts.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/BitcodeStripOpts.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/tools/llvm-objcopy/BitcodeStripOpts.td llvm/Option/OptParser.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/BitcodeStripOpts.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/BitcodeStripOpts.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include
-        contrib/libs/llvm12/tools/llvm-objcopy/InstallNameToolOpts.td --write-if-changed -o
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/InstallNameToolOpts.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/InstallNameToolOpts.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/tools/llvm-objcopy/InstallNameToolOpts.td llvm/Option/OptParser.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/InstallNameToolOpts.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/InstallNameToolOpts.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-objcopy/ObjcopyOpts.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/ObjcopyOpts.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/ObjcopyOpts.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/tools/llvm-objcopy/CommonOpts.td
-        contrib/libs/llvm12/tools/llvm-objcopy/ObjcopyOpts.td llvm/Option/OptParser.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/ObjcopyOpts.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/ObjcopyOpts.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-objcopy/StripOpts.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/StripOpts.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/StripOpts.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/tools/llvm-objcopy/CommonOpts.td
-        contrib/libs/llvm12/tools/llvm-objcopy/StripOpts.td llvm/Option/OptParser.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/StripOpts.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy/StripOpts.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-rc -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-rc/Opts.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-rc/Opts.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-rc/Opts.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/tools/llvm-rc/Opts.td llvm/Option/OptParser.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-rc/Opts.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-rc/Opts.inc.d
-)
-
-RUN_PROGRAM(
-    contrib/libs/llvm12/utils/TableGen -gen-opt-parser-defs -I
-        ${ARCADIA_ROOT}/contrib/libs/llvm12/tools/llvm-symbolizer -Iinclude
-        -I${ARCADIA_ROOT}/contrib/libs/llvm12/include contrib/libs/llvm12/tools/llvm-symbolizer/Opts.td
-        --write-if-changed -o ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-symbolizer/Opts.inc -d
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-symbolizer/Opts.inc.d
-    CWD ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12
-    IN contrib/libs/llvm12/tools/llvm-symbolizer/Opts.td llvm/Option/OptParser.td
-    OUT_NOAUTO ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-symbolizer/Opts.inc
-        ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-symbolizer/Opts.inc.d
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Analysis/ya.make b/contrib/libs/llvm12/lib/Analysis/ya.make
deleted file mode 100644
index 6e09c89fe41..00000000000
--- a/contrib/libs/llvm12/lib/Analysis/ya.make
+++ /dev/null
@@ -1,151 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(
-    Apache-2.0 WITH LLVM-exception AND
-    NCSA
-)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/ProfileData
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Analysis
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AliasAnalysis.cpp
-    AliasAnalysisEvaluator.cpp
-    AliasAnalysisSummary.cpp
-    AliasSetTracker.cpp
-    Analysis.cpp
-    AssumeBundleQueries.cpp
-    AssumptionCache.cpp
-    BasicAliasAnalysis.cpp
-    BlockFrequencyInfo.cpp
-    BlockFrequencyInfoImpl.cpp
-    BranchProbabilityInfo.cpp
-    CFG.cpp
-    CFGPrinter.cpp
-    CFLAndersAliasAnalysis.cpp
-    CFLSteensAliasAnalysis.cpp
-    CGSCCPassManager.cpp
-    CallGraph.cpp
-    CallGraphSCCPass.cpp
-    CallPrinter.cpp
-    CaptureTracking.cpp
-    CmpInstAnalysis.cpp
-    CodeMetrics.cpp
-    ConstantFolding.cpp
-    ConstraintSystem.cpp
-    CostModel.cpp
-    DDG.cpp
-    DDGPrinter.cpp
-    Delinearization.cpp
-    DemandedBits.cpp
-    DependenceAnalysis.cpp
-    DependenceGraphBuilder.cpp
-    DevelopmentModeInlineAdvisor.cpp
-    DivergenceAnalysis.cpp
-    DomPrinter.cpp
-    DomTreeUpdater.cpp
-    DominanceFrontier.cpp
-    EHPersonalities.cpp
-    FunctionPropertiesAnalysis.cpp
-    GlobalsModRef.cpp
-    GuardUtils.cpp
-    HeatUtils.cpp
-    IRSimilarityIdentifier.cpp
-    IVDescriptors.cpp
-    IVUsers.cpp
-    ImportedFunctionsInliningStatistics.cpp
-    IndirectCallPromotionAnalysis.cpp
-    InlineAdvisor.cpp
-    InlineCost.cpp
-    InlineSizeEstimatorAnalysis.cpp
-    InstCount.cpp
-    InstructionPrecedenceTracking.cpp
-    InstructionSimplify.cpp
-    Interval.cpp
-    IntervalPartition.cpp
-    LazyBlockFrequencyInfo.cpp
-    LazyBranchProbabilityInfo.cpp
-    LazyCallGraph.cpp
-    LazyValueInfo.cpp
-    LegacyDivergenceAnalysis.cpp
-    Lint.cpp
-    Loads.cpp
-    LoopAccessAnalysis.cpp
-    LoopAnalysisManager.cpp
-    LoopCacheAnalysis.cpp
-    LoopInfo.cpp
-    LoopNestAnalysis.cpp
-    LoopPass.cpp
-    LoopUnrollAnalyzer.cpp
-    MLInlineAdvisor.cpp
-    MemDepPrinter.cpp
-    MemDerefPrinter.cpp
-    MemoryBuiltins.cpp
-    MemoryDependenceAnalysis.cpp
-    MemoryLocation.cpp
-    MemorySSA.cpp
-    MemorySSAUpdater.cpp
-    ModuleDebugInfoPrinter.cpp
-    ModuleSummaryAnalysis.cpp
-    MustExecute.cpp
-    ObjCARCAliasAnalysis.cpp
-    ObjCARCAnalysisUtils.cpp
-    ObjCARCInstKind.cpp
-    OptimizationRemarkEmitter.cpp
-    PHITransAddr.cpp
-    PhiValues.cpp
-    PostDominators.cpp
-    ProfileSummaryInfo.cpp
-    PtrUseVisitor.cpp
-    RegionInfo.cpp
-    RegionPass.cpp
-    RegionPrinter.cpp
-    ReleaseModeModelRunner.cpp
-    ReplayInlineAdvisor.cpp
-    ScalarEvolution.cpp
-    ScalarEvolutionAliasAnalysis.cpp
-    ScalarEvolutionDivision.cpp
-    ScalarEvolutionNormalization.cpp
-    ScopedNoAliasAA.cpp
-    StackLifetime.cpp
-    StackSafetyAnalysis.cpp
-    SyncDependenceAnalysis.cpp
-    SyntheticCountsUtils.cpp
-    TFUtils.cpp
-    TargetLibraryInfo.cpp
-    TargetTransformInfo.cpp
-    Trace.cpp
-    TypeBasedAliasAnalysis.cpp
-    TypeMetadataUtils.cpp
-    VFABIDemangling.cpp
-    ValueLattice.cpp
-    ValueLatticeUtils.cpp
-    ValueTracking.cpp
-    VectorUtils.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/AsmParser/ya.make b/contrib/libs/llvm12/lib/AsmParser/ya.make
deleted file mode 100644
index a84b5563eb7..00000000000
--- a/contrib/libs/llvm12/lib/AsmParser/ya.make
+++ /dev/null
@@ -1,36 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/AsmParser
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    LLLexer.cpp
-    LLParser.cpp
-    Parser.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/BinaryFormat/ya.make b/contrib/libs/llvm12/lib/BinaryFormat/ya.make
deleted file mode 100644
index c1d64fa5a68..00000000000
--- a/contrib/libs/llvm12/lib/BinaryFormat/ya.make
+++ /dev/null
@@ -1,44 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(
-    Apache-2.0 WITH LLVM-exception AND
-    NCSA
-)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/BinaryFormat
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AMDGPUMetadataVerifier.cpp
-    Dwarf.cpp
-    MachO.cpp
-    Magic.cpp
-    Minidump.cpp
-    MsgPackDocument.cpp
-    MsgPackDocumentYAML.cpp
-    MsgPackReader.cpp
-    MsgPackWriter.cpp
-    Wasm.cpp
-    XCOFF.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Bitcode/Reader/ya.make b/contrib/libs/llvm12/lib/Bitcode/Reader/ya.make
deleted file mode 100644
index c648d2fc667..00000000000
--- a/contrib/libs/llvm12/lib/Bitcode/Reader/ya.make
+++ /dev/null
@@ -1,38 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Bitstream/Reader
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Bitcode/Reader
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    BitReader.cpp
-    BitcodeAnalyzer.cpp
-    BitcodeReader.cpp
-    MetadataLoader.cpp
-    ValueList.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Bitcode/Writer/ya.make b/contrib/libs/llvm12/lib/Bitcode/Writer/ya.make
deleted file mode 100644
index 624b4f8e7e9..00000000000
--- a/contrib/libs/llvm12/lib/Bitcode/Writer/ya.make
+++ /dev/null
@@ -1,39 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Bitcode/Writer
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    BitWriter.cpp
-    BitcodeWriter.cpp
-    BitcodeWriterPass.cpp
-    ValueEnumerator.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Bitstream/Reader/ya.make b/contrib/libs/llvm12/lib/Bitstream/Reader/ya.make
deleted file mode 100644
index 09acec1b474..00000000000
--- a/contrib/libs/llvm12/lib/Bitstream/Reader/ya.make
+++ /dev/null
@@ -1,31 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Bitstream/Reader
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    BitstreamReader.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/CodeGen/AsmPrinter/ya.make b/contrib/libs/llvm12/lib/CodeGen/AsmPrinter/ya.make
deleted file mode 100644
index 47d6139b3d4..00000000000
--- a/contrib/libs/llvm12/lib/CodeGen/AsmPrinter/ya.make
+++ /dev/null
@@ -1,75 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/CodeGen
-    contrib/libs/llvm12/lib/DebugInfo/CodeView
-    contrib/libs/llvm12/lib/DebugInfo/DWARF
-    contrib/libs/llvm12/lib/DebugInfo/MSF
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCParser
-    contrib/libs/llvm12/lib/Remarks
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target
-)
-
-IF (SANITIZER_TYPE == "undefined")
-    PEERDIR(
-        contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
-    )
-ENDIF()
-
-ADDINCL(
-    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AIXException.cpp
-    ARMException.cpp
-    AccelTable.cpp
-    AddressPool.cpp
-    AsmPrinter.cpp
-    AsmPrinterDwarf.cpp
-    AsmPrinterInlineAsm.cpp
-    CodeViewDebug.cpp
-    DIE.cpp
-    DIEHash.cpp
-    DbgEntityHistoryCalculator.cpp
-    DebugHandlerBase.cpp
-    DebugLocStream.cpp
-    DwarfCFIException.cpp
-    DwarfCompileUnit.cpp
-    DwarfDebug.cpp
-    DwarfExpression.cpp
-    DwarfFile.cpp
-    DwarfStringPool.cpp
-    DwarfUnit.cpp
-    EHStreamer.cpp
-    ErlangGCPrinter.cpp
-    OcamlGCPrinter.cpp
-    PseudoProbePrinter.cpp
-    WasmException.cpp
-    WinCFGuard.cpp
-    WinException.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/CodeGen/GlobalISel/ya.make b/contrib/libs/llvm12/lib/CodeGen/GlobalISel/ya.make
deleted file mode 100644
index e6de0fe8d9a..00000000000
--- a/contrib/libs/llvm12/lib/CodeGen/GlobalISel/ya.make
+++ /dev/null
@@ -1,62 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/CodeGen
-    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/CodeGen/GlobalISel
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    CSEInfo.cpp
-    CSEMIRBuilder.cpp
-    CallLowering.cpp
-    Combiner.cpp
-    CombinerHelper.cpp
-    GISelChangeObserver.cpp
-    GISelKnownBits.cpp
-    GlobalISel.cpp
-    IRTranslator.cpp
-    InlineAsmLowering.cpp
-    InstructionSelect.cpp
-    InstructionSelector.cpp
-    LegalityPredicates.cpp
-    LegalizeMutations.cpp
-    Legalizer.cpp
-    LegalizerHelper.cpp
-    LegalizerInfo.cpp
-    Localizer.cpp
-    LostDebugLocObserver.cpp
-    MachineIRBuilder.cpp
-    RegBankSelect.cpp
-    RegisterBank.cpp
-    RegisterBankInfo.cpp
-    Utils.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/CodeGen/MIRParser/ya.make b/contrib/libs/llvm12/lib/CodeGen/MIRParser/ya.make
deleted file mode 100644
index aa8e6d8693a..00000000000
--- a/contrib/libs/llvm12/lib/CodeGen/MIRParser/ya.make
+++ /dev/null
@@ -1,40 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/AsmParser
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/CodeGen
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/CodeGen/MIRParser
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    MILexer.cpp
-    MIParser.cpp
-    MIRParser.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/CodeGen/SelectionDAG/ya.make b/contrib/libs/llvm12/lib/CodeGen/SelectionDAG/ya.make
deleted file mode 100644
index 9fa4f90d2f6..00000000000
--- a/contrib/libs/llvm12/lib/CodeGen/SelectionDAG/ya.make
+++ /dev/null
@@ -1,62 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/CodeGen
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    DAGCombiner.cpp
-    FastISel.cpp
-    FunctionLoweringInfo.cpp
-    InstrEmitter.cpp
-    LegalizeDAG.cpp
-    LegalizeFloatTypes.cpp
-    LegalizeIntegerTypes.cpp
-    LegalizeTypes.cpp
-    LegalizeTypesGeneric.cpp
-    LegalizeVectorOps.cpp
-    LegalizeVectorTypes.cpp
-    ResourcePriorityQueue.cpp
-    ScheduleDAGFast.cpp
-    ScheduleDAGRRList.cpp
-    ScheduleDAGSDNodes.cpp
-    ScheduleDAGVLIW.cpp
-    SelectionDAG.cpp
-    SelectionDAGAddressAnalysis.cpp
-    SelectionDAGBuilder.cpp
-    SelectionDAGDumper.cpp
-    SelectionDAGISel.cpp
-    SelectionDAGPrinter.cpp
-    SelectionDAGTargetInfo.cpp
-    StatepointLowering.cpp
-    TargetLowering.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/CodeGen/ya.make b/contrib/libs/llvm12/lib/CodeGen/ya.make
deleted file mode 100644
index ed4f607e748..00000000000
--- a/contrib/libs/llvm12/lib/CodeGen/ya.make
+++ /dev/null
@@ -1,233 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(
-    Apache-2.0 WITH LLVM-exception AND
-    NCSA
-)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/Bitcode/Reader
-    contrib/libs/llvm12/lib/Bitcode/Writer
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/ProfileData
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target
-    contrib/libs/llvm12/lib/Transforms/Scalar
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/CodeGen
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AggressiveAntiDepBreaker.cpp
-    AllocationOrder.cpp
-    Analysis.cpp
-    AtomicExpandPass.cpp
-    BasicBlockSections.cpp
-    BasicTargetTransformInfo.cpp
-    BranchFolding.cpp
-    BranchRelaxation.cpp
-    BreakFalseDeps.cpp
-    BuiltinGCs.cpp
-    CFGuardLongjmp.cpp
-    CFIInstrInserter.cpp
-    CalcSpillWeights.cpp
-    CallingConvLower.cpp
-    CodeGen.cpp
-    CodeGenPassBuilder.cpp
-    CodeGenPrepare.cpp
-    CommandFlags.cpp
-    CriticalAntiDepBreaker.cpp
-    DFAPacketizer.cpp
-    DeadMachineInstructionElim.cpp
-    DetectDeadLanes.cpp
-    DwarfEHPrepare.cpp
-    EarlyIfConversion.cpp
-    EdgeBundles.cpp
-    ExecutionDomainFix.cpp
-    ExpandMemCmp.cpp
-    ExpandPostRAPseudos.cpp
-    ExpandReductions.cpp
-    FEntryInserter.cpp
-    FaultMaps.cpp
-    FinalizeISel.cpp
-    FixupStatepointCallerSaved.cpp
-    FuncletLayout.cpp
-    GCMetadata.cpp
-    GCMetadataPrinter.cpp
-    GCRootLowering.cpp
-    GCStrategy.cpp
-    GlobalMerge.cpp
-    HardwareLoops.cpp
-    IfConversion.cpp
-    ImplicitNullChecks.cpp
-    IndirectBrExpandPass.cpp
-    InlineSpiller.cpp
-    InterferenceCache.cpp
-    InterleavedAccessPass.cpp
-    InterleavedLoadCombinePass.cpp
-    IntrinsicLowering.cpp
-    LLVMTargetMachine.cpp
-    LatencyPriorityQueue.cpp
-    LazyMachineBlockFrequencyInfo.cpp
-    LexicalScopes.cpp
-    LiveDebugValues/InstrRefBasedImpl.cpp
-    LiveDebugValues/LiveDebugValues.cpp
-    LiveDebugValues/VarLocBasedImpl.cpp
-    LiveDebugVariables.cpp
-    LiveInterval.cpp
-    LiveIntervalCalc.cpp
-    LiveIntervalUnion.cpp
-    LiveIntervals.cpp
-    LivePhysRegs.cpp
-    LiveRangeCalc.cpp
-    LiveRangeEdit.cpp
-    LiveRangeShrink.cpp
-    LiveRegMatrix.cpp
-    LiveRegUnits.cpp
-    LiveStacks.cpp
-    LiveVariables.cpp
-    LocalStackSlotAllocation.cpp
-    LoopTraversal.cpp
-    LowLevelType.cpp
-    LowerEmuTLS.cpp
-    MBFIWrapper.cpp
-    MIRCanonicalizerPass.cpp
-    MIRNamerPass.cpp
-    MIRPrinter.cpp
-    MIRPrintingPass.cpp
-    MIRVRegNamerUtils.cpp
-    MachineBasicBlock.cpp
-    MachineBlockFrequencyInfo.cpp
-    MachineBlockPlacement.cpp
-    MachineBranchProbabilityInfo.cpp
-    MachineCSE.cpp
-    MachineCheckDebugify.cpp
-    MachineCombiner.cpp
-    MachineCopyPropagation.cpp
-    MachineDebugify.cpp
-    MachineDominanceFrontier.cpp
-    MachineDominators.cpp
-    MachineFrameInfo.cpp
-    MachineFunction.cpp
-    MachineFunctionPass.cpp
-    MachineFunctionPrinterPass.cpp
-    MachineFunctionSplitter.cpp
-    MachineInstr.cpp
-    MachineInstrBundle.cpp
-    MachineLICM.cpp
-    MachineLoopInfo.cpp
-    MachineLoopUtils.cpp
-    MachineModuleInfo.cpp
-    MachineModuleInfoImpls.cpp
-    MachineOperand.cpp
-    MachineOptimizationRemarkEmitter.cpp
-    MachineOutliner.cpp
-    MachinePassManager.cpp
-    MachinePipeliner.cpp
-    MachinePostDominators.cpp
-    MachineRegionInfo.cpp
-    MachineRegisterInfo.cpp
-    MachineSSAUpdater.cpp
-    MachineScheduler.cpp
-    MachineSink.cpp
-    MachineSizeOpts.cpp
-    MachineStableHash.cpp
-    MachineStripDebug.cpp
-    MachineTraceMetrics.cpp
-    MachineVerifier.cpp
-    MacroFusion.cpp
-    ModuloSchedule.cpp
-    MultiHazardRecognizer.cpp
-    NonRelocatableStringpool.cpp
-    OptimizePHIs.cpp
-    PHIElimination.cpp
-    PHIEliminationUtils.cpp
-    ParallelCG.cpp
-    PatchableFunction.cpp
-    PeepholeOptimizer.cpp
-    PostRAHazardRecognizer.cpp
-    PostRASchedulerList.cpp
-    PreISelIntrinsicLowering.cpp
-    ProcessImplicitDefs.cpp
-    PrologEpilogInserter.cpp
-    PseudoProbeInserter.cpp
-    PseudoSourceValue.cpp
-    RDFGraph.cpp
-    RDFLiveness.cpp
-    RDFRegisters.cpp
-    ReachingDefAnalysis.cpp
-    RegAllocBase.cpp
-    RegAllocBasic.cpp
-    RegAllocFast.cpp
-    RegAllocGreedy.cpp
-    RegAllocPBQP.cpp
-    RegUsageInfoCollector.cpp
-    RegUsageInfoPropagate.cpp
-    RegisterClassInfo.cpp
-    RegisterCoalescer.cpp
-    RegisterPressure.cpp
-    RegisterScavenging.cpp
-    RegisterUsageInfo.cpp
-    RenameIndependentSubregs.cpp
-    ResetMachineFunctionPass.cpp
-    SafeStack.cpp
-    SafeStackLayout.cpp
-    ScheduleDAG.cpp
-    ScheduleDAGInstrs.cpp
-    ScheduleDAGPrinter.cpp
-    ScoreboardHazardRecognizer.cpp
-    ShadowStackGCLowering.cpp
-    ShrinkWrap.cpp
-    SjLjEHPrepare.cpp
-    SlotIndexes.cpp
-    SpillPlacement.cpp
-    SplitKit.cpp
-    StackColoring.cpp
-    StackMapLivenessAnalysis.cpp
-    StackMaps.cpp
-    StackProtector.cpp
-    StackSlotColoring.cpp
-    SwiftErrorValueTracking.cpp
-    SwitchLoweringUtils.cpp
-    TailDuplication.cpp
-    TailDuplicator.cpp
-    TargetFrameLoweringImpl.cpp
-    TargetInstrInfo.cpp
-    TargetLoweringBase.cpp
-    TargetLoweringObjectFileImpl.cpp
-    TargetOptionsImpl.cpp
-    TargetPassConfig.cpp
-    TargetRegisterInfo.cpp
-    TargetSchedule.cpp
-    TargetSubtargetInfo.cpp
-    TwoAddressInstructionPass.cpp
-    TypePromotion.cpp
-    UnreachableBlockElim.cpp
-    ValueTypes.cpp
-    VirtRegMap.cpp
-    WasmEHPrepare.cpp
-    WinEHPrepare.cpp
-    XRayInstrumentation.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/DebugInfo/CodeView/ya.make b/contrib/libs/llvm12/lib/DebugInfo/CodeView/ya.make
deleted file mode 100644
index 8829a8f09f5..00000000000
--- a/contrib/libs/llvm12/lib/DebugInfo/CodeView/ya.make
+++ /dev/null
@@ -1,71 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/DebugInfo/MSF
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/DebugInfo/CodeView
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AppendingTypeTableBuilder.cpp
-    CVSymbolVisitor.cpp
-    CVTypeVisitor.cpp
-    CodeViewError.cpp
-    CodeViewRecordIO.cpp
-    ContinuationRecordBuilder.cpp
-    DebugChecksumsSubsection.cpp
-    DebugCrossExSubsection.cpp
-    DebugCrossImpSubsection.cpp
-    DebugFrameDataSubsection.cpp
-    DebugInlineeLinesSubsection.cpp
-    DebugLinesSubsection.cpp
-    DebugStringTableSubsection.cpp
-    DebugSubsection.cpp
-    DebugSubsectionRecord.cpp
-    DebugSubsectionVisitor.cpp
-    DebugSymbolRVASubsection.cpp
-    DebugSymbolsSubsection.cpp
-    EnumTables.cpp
-    Formatters.cpp
-    GlobalTypeTableBuilder.cpp
-    LazyRandomTypeCollection.cpp
-    Line.cpp
-    MergingTypeTableBuilder.cpp
-    RecordName.cpp
-    RecordSerialization.cpp
-    SimpleTypeSerializer.cpp
-    StringsAndChecksums.cpp
-    SymbolDumper.cpp
-    SymbolRecordHelpers.cpp
-    SymbolRecordMapping.cpp
-    SymbolSerializer.cpp
-    TypeDumpVisitor.cpp
-    TypeHashing.cpp
-    TypeIndex.cpp
-    TypeIndexDiscovery.cpp
-    TypeRecordHelpers.cpp
-    TypeRecordMapping.cpp
-    TypeStreamMerger.cpp
-    TypeTableCollection.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/DebugInfo/DWARF/ya.make b/contrib/libs/llvm12/lib/DebugInfo/DWARF/ya.make
deleted file mode 100644
index 5cb9397828b..00000000000
--- a/contrib/libs/llvm12/lib/DebugInfo/DWARF/ya.make
+++ /dev/null
@@ -1,61 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/DebugInfo/DWARF
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    DWARFAbbreviationDeclaration.cpp
-    DWARFAcceleratorTable.cpp
-    DWARFAddressRange.cpp
-    DWARFCompileUnit.cpp
-    DWARFContext.cpp
-    DWARFDataExtractor.cpp
-    DWARFDebugAbbrev.cpp
-    DWARFDebugAddr.cpp
-    DWARFDebugArangeSet.cpp
-    DWARFDebugAranges.cpp
-    DWARFDebugFrame.cpp
-    DWARFDebugInfoEntry.cpp
-    DWARFDebugLine.cpp
-    DWARFDebugLoc.cpp
-    DWARFDebugMacro.cpp
-    DWARFDebugPubTable.cpp
-    DWARFDebugRangeList.cpp
-    DWARFDebugRnglists.cpp
-    DWARFDie.cpp
-    DWARFExpression.cpp
-    DWARFFormValue.cpp
-    DWARFGdbIndex.cpp
-    DWARFListTable.cpp
-    DWARFLocationExpression.cpp
-    DWARFTypeUnit.cpp
-    DWARFUnit.cpp
-    DWARFUnitIndex.cpp
-    DWARFVerifier.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/DebugInfo/MSF/ya.make b/contrib/libs/llvm12/lib/DebugInfo/MSF/ya.make
deleted file mode 100644
index a9daa7d1aa0..00000000000
--- a/contrib/libs/llvm12/lib/DebugInfo/MSF/ya.make
+++ /dev/null
@@ -1,34 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/DebugInfo/MSF
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    MSFBuilder.cpp
-    MSFCommon.cpp
-    MSFError.cpp
-    MappedBlockStream.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/DebugInfo/PDB/ya.make b/contrib/libs/llvm12/lib/DebugInfo/PDB/ya.make
deleted file mode 100644
index daa2f8ed3ac..00000000000
--- a/contrib/libs/llvm12/lib/DebugInfo/PDB/ya.make
+++ /dev/null
@@ -1,124 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/DebugInfo/CodeView
-    contrib/libs/llvm12/lib/DebugInfo/MSF
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/DebugInfo/PDB
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    GenericError.cpp
-    IPDBSourceFile.cpp
-    Native/DbiModuleDescriptor.cpp
-    Native/DbiModuleDescriptorBuilder.cpp
-    Native/DbiModuleList.cpp
-    Native/DbiStream.cpp
-    Native/DbiStreamBuilder.cpp
-    Native/EnumTables.cpp
-    Native/GSIStreamBuilder.cpp
-    Native/GlobalsStream.cpp
-    Native/Hash.cpp
-    Native/HashTable.cpp
-    Native/InfoStream.cpp
-    Native/InfoStreamBuilder.cpp
-    Native/InjectedSourceStream.cpp
-    Native/ModuleDebugStream.cpp
-    Native/NamedStreamMap.cpp
-    Native/NativeCompilandSymbol.cpp
-    Native/NativeEnumGlobals.cpp
-    Native/NativeEnumInjectedSources.cpp
-    Native/NativeEnumLineNumbers.cpp
-    Native/NativeEnumModules.cpp
-    Native/NativeEnumSymbols.cpp
-    Native/NativeEnumTypes.cpp
-    Native/NativeExeSymbol.cpp
-    Native/NativeFunctionSymbol.cpp
-    Native/NativeInlineSiteSymbol.cpp
-    Native/NativeLineNumber.cpp
-    Native/NativePublicSymbol.cpp
-    Native/NativeRawSymbol.cpp
-    Native/NativeSession.cpp
-    Native/NativeSourceFile.cpp
-    Native/NativeSymbolEnumerator.cpp
-    Native/NativeTypeArray.cpp
-    Native/NativeTypeBuiltin.cpp
-    Native/NativeTypeEnum.cpp
-    Native/NativeTypeFunctionSig.cpp
-    Native/NativeTypePointer.cpp
-    Native/NativeTypeTypedef.cpp
-    Native/NativeTypeUDT.cpp
-    Native/NativeTypeVTShape.cpp
-    Native/PDBFile.cpp
-    Native/PDBFileBuilder.cpp
-    Native/PDBStringTable.cpp
-    Native/PDBStringTableBuilder.cpp
-    Native/PublicsStream.cpp
-    Native/RawError.cpp
-    Native/SymbolCache.cpp
-    Native/SymbolStream.cpp
-    Native/TpiHashing.cpp
-    Native/TpiStream.cpp
-    Native/TpiStreamBuilder.cpp
-    PDB.cpp
-    PDBContext.cpp
-    PDBExtras.cpp
-    PDBInterfaceAnchors.cpp
-    PDBSymDumper.cpp
-    PDBSymbol.cpp
-    PDBSymbolAnnotation.cpp
-    PDBSymbolBlock.cpp
-    PDBSymbolCompiland.cpp
-    PDBSymbolCompilandDetails.cpp
-    PDBSymbolCompilandEnv.cpp
-    PDBSymbolCustom.cpp
-    PDBSymbolData.cpp
-    PDBSymbolExe.cpp
-    PDBSymbolFunc.cpp
-    PDBSymbolFuncDebugEnd.cpp
-    PDBSymbolFuncDebugStart.cpp
-    PDBSymbolLabel.cpp
-    PDBSymbolPublicSymbol.cpp
-    PDBSymbolThunk.cpp
-    PDBSymbolTypeArray.cpp
-    PDBSymbolTypeBaseClass.cpp
-    PDBSymbolTypeBuiltin.cpp
-    PDBSymbolTypeCustom.cpp
-    PDBSymbolTypeDimension.cpp
-    PDBSymbolTypeEnum.cpp
-    PDBSymbolTypeFriend.cpp
-    PDBSymbolTypeFunctionArg.cpp
-    PDBSymbolTypeFunctionSig.cpp
-    PDBSymbolTypeManaged.cpp
-    PDBSymbolTypePointer.cpp
-    PDBSymbolTypeTypedef.cpp
-    PDBSymbolTypeUDT.cpp
-    PDBSymbolTypeVTable.cpp
-    PDBSymbolTypeVTableShape.cpp
-    PDBSymbolUnknown.cpp
-    PDBSymbolUsingNamespace.cpp
-    UDTLayout.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/DebugInfo/Symbolize/ya.make b/contrib/libs/llvm12/lib/DebugInfo/Symbolize/ya.make
deleted file mode 100644
index b627533f823..00000000000
--- a/contrib/libs/llvm12/lib/DebugInfo/Symbolize/ya.make
+++ /dev/null
@@ -1,37 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/DebugInfo/DWARF
-    contrib/libs/llvm12/lib/DebugInfo/PDB
-    contrib/libs/llvm12/lib/Demangle
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/DebugInfo/Symbolize
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    DIPrinter.cpp
-    SymbolizableObjectFile.cpp
-    Symbolize.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Demangle/ya.make b/contrib/libs/llvm12/lib/Demangle/ya.make
deleted file mode 100644
index 16c0cf64f70..00000000000
--- a/contrib/libs/llvm12/lib/Demangle/ya.make
+++ /dev/null
@@ -1,33 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Demangle
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    Demangle.cpp
-    ItaniumDemangle.cpp
-    MicrosoftDemangle.cpp
-    MicrosoftDemangleNodes.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/ExecutionEngine/MCJIT/ya.make b/contrib/libs/llvm12/lib/ExecutionEngine/MCJIT/ya.make
deleted file mode 100644
index 71377b654c2..00000000000
--- a/contrib/libs/llvm12/lib/ExecutionEngine/MCJIT/ya.make
+++ /dev/null
@@ -1,37 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/ExecutionEngine
-    contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/ExecutionEngine/MCJIT
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    MCJIT.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/ExecutionEngine/PerfJITEvents/ya.make b/contrib/libs/llvm12/lib/ExecutionEngine/PerfJITEvents/ya.make
deleted file mode 100644
index dc91e6b8012..00000000000
--- a/contrib/libs/llvm12/lib/ExecutionEngine/PerfJITEvents/ya.make
+++ /dev/null
@@ -1,37 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/CodeGen
-    contrib/libs/llvm12/lib/DebugInfo/DWARF
-    contrib/libs/llvm12/lib/ExecutionEngine
-    contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/ExecutionEngine/PerfJITEvents
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    PerfJITEventListener.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld/ya.make b/contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld/ya.make
deleted file mode 100644
index 44d7dea1182..00000000000
--- a/contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld/ya.make
+++ /dev/null
@@ -1,42 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    JITSymbol.cpp
-    RTDyldMemoryManager.cpp
-    RuntimeDyld.cpp
-    RuntimeDyldCOFF.cpp
-    RuntimeDyldChecker.cpp
-    RuntimeDyldELF.cpp
-    RuntimeDyldMachO.cpp
-    Targets/RuntimeDyldELFMips.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/ExecutionEngine/ya.make b/contrib/libs/llvm12/lib/ExecutionEngine/ya.make
deleted file mode 100644
index 38849572cb9..00000000000
--- a/contrib/libs/llvm12/lib/ExecutionEngine/ya.make
+++ /dev/null
@@ -1,41 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/ExecutionEngine/RuntimeDyld
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/ExecutionEngine
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    ExecutionEngine.cpp
-    ExecutionEngineBindings.cpp
-    GDBRegistrationListener.cpp
-    SectionMemoryManager.cpp
-    TargetSelect.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Frontend/OpenMP/ya.make b/contrib/libs/llvm12/lib/Frontend/OpenMP/ya.make
deleted file mode 100644
index 3a64ea8b69a..00000000000
--- a/contrib/libs/llvm12/lib/Frontend/OpenMP/ya.make
+++ /dev/null
@@ -1,36 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Frontend/OpenMP
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    OMP.cpp
-    OMPContext.cpp
-    OMPIRBuilder.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/IR/ya.make b/contrib/libs/llvm12/lib/IR/ya.make
deleted file mode 100644
index 5c27c5b009e..00000000000
--- a/contrib/libs/llvm12/lib/IR/ya.make
+++ /dev/null
@@ -1,93 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/Remarks
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/IR
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AbstractCallSite.cpp
-    AsmWriter.cpp
-    Assumptions.cpp
-    Attributes.cpp
-    AutoUpgrade.cpp
-    BasicBlock.cpp
-    Comdat.cpp
-    ConstantFold.cpp
-    ConstantRange.cpp
-    Constants.cpp
-    Core.cpp
-    DIBuilder.cpp
-    DataLayout.cpp
-    DebugInfo.cpp
-    DebugInfoMetadata.cpp
-    DebugLoc.cpp
-    DiagnosticHandler.cpp
-    DiagnosticInfo.cpp
-    DiagnosticPrinter.cpp
-    Dominators.cpp
-    FPEnv.cpp
-    Function.cpp
-    GVMaterializer.cpp
-    Globals.cpp
-    IRBuilder.cpp
-    IRPrintingPasses.cpp
-    InlineAsm.cpp
-    Instruction.cpp
-    Instructions.cpp
-    IntrinsicInst.cpp
-    LLVMContext.cpp
-    LLVMContextImpl.cpp
-    LLVMRemarkStreamer.cpp
-    LegacyPassManager.cpp
-    MDBuilder.cpp
-    Mangler.cpp
-    Metadata.cpp
-    Module.cpp
-    ModuleSummaryIndex.cpp
-    Operator.cpp
-    OptBisect.cpp
-    Pass.cpp
-    PassInstrumentation.cpp
-    PassManager.cpp
-    PassRegistry.cpp
-    PassTimingInfo.cpp
-    PrintPasses.cpp
-    ProfileSummary.cpp
-    PseudoProbe.cpp
-    ReplaceConstant.cpp
-    SafepointIRVerifier.cpp
-    Statepoint.cpp
-    StructuralHash.cpp
-    Type.cpp
-    TypeFinder.cpp
-    Use.cpp
-    User.cpp
-    Value.cpp
-    ValueSymbolTable.cpp
-    Verifier.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/IRReader/ya.make b/contrib/libs/llvm12/lib/IRReader/ya.make
deleted file mode 100644
index 6ccecf0b7cb..00000000000
--- a/contrib/libs/llvm12/lib/IRReader/ya.make
+++ /dev/null
@@ -1,35 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/AsmParser
-    contrib/libs/llvm12/lib/Bitcode/Reader
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/IRReader
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    IRReader.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Linker/ya.make b/contrib/libs/llvm12/lib/Linker/ya.make
deleted file mode 100644
index 7dc901efbaa..00000000000
--- a/contrib/libs/llvm12/lib/Linker/ya.make
+++ /dev/null
@@ -1,36 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Linker
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    IRMover.cpp
-    LinkModules.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/MC/MCDisassembler/ya.make b/contrib/libs/llvm12/lib/MC/MCDisassembler/ya.make
deleted file mode 100644
index 160728d237c..00000000000
--- a/contrib/libs/llvm12/lib/MC/MCDisassembler/ya.make
+++ /dev/null
@@ -1,36 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/MC/MCDisassembler
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    Disassembler.cpp
-    MCDisassembler.cpp
-    MCExternalSymbolizer.cpp
-    MCRelocationInfo.cpp
-    MCSymbolizer.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/MC/MCParser/ya.make b/contrib/libs/llvm12/lib/MC/MCParser/ya.make
deleted file mode 100644
index 304ad7d65a3..00000000000
--- a/contrib/libs/llvm12/lib/MC/MCParser/ya.make
+++ /dev/null
@@ -1,43 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/MC/MCParser
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AsmLexer.cpp
-    AsmParser.cpp
-    COFFAsmParser.cpp
-    COFFMasmParser.cpp
-    DarwinAsmParser.cpp
-    ELFAsmParser.cpp
-    MCAsmLexer.cpp
-    MCAsmParser.cpp
-    MCAsmParserExtension.cpp
-    MCTargetAsmParser.cpp
-    MasmParser.cpp
-    WasmAsmParser.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/MC/ya.make b/contrib/libs/llvm12/lib/MC/ya.make
deleted file mode 100644
index 3d136d74265..00000000000
--- a/contrib/libs/llvm12/lib/MC/ya.make
+++ /dev/null
@@ -1,95 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/DebugInfo/CodeView
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/MC
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    ConstantPools.cpp
-    ELFObjectWriter.cpp
-    MCAsmBackend.cpp
-    MCAsmInfo.cpp
-    MCAsmInfoCOFF.cpp
-    MCAsmInfoDarwin.cpp
-    MCAsmInfoELF.cpp
-    MCAsmInfoWasm.cpp
-    MCAsmInfoXCOFF.cpp
-    MCAsmMacro.cpp
-    MCAsmStreamer.cpp
-    MCAssembler.cpp
-    MCCodeEmitter.cpp
-    MCCodeView.cpp
-    MCContext.cpp
-    MCDwarf.cpp
-    MCELFObjectTargetWriter.cpp
-    MCELFStreamer.cpp
-    MCExpr.cpp
-    MCFragment.cpp
-    MCInst.cpp
-    MCInstPrinter.cpp
-    MCInstrAnalysis.cpp
-    MCInstrDesc.cpp
-    MCInstrInfo.cpp
-    MCLabel.cpp
-    MCLinkerOptimizationHint.cpp
-    MCMachOStreamer.cpp
-    MCMachObjectTargetWriter.cpp
-    MCNullStreamer.cpp
-    MCObjectFileInfo.cpp
-    MCObjectStreamer.cpp
-    MCObjectWriter.cpp
-    MCPseudoProbe.cpp
-    MCRegisterInfo.cpp
-    MCSchedule.cpp
-    MCSection.cpp
-    MCSectionCOFF.cpp
-    MCSectionELF.cpp
-    MCSectionMachO.cpp
-    MCSectionWasm.cpp
-    MCSectionXCOFF.cpp
-    MCStreamer.cpp
-    MCSubtargetInfo.cpp
-    MCSymbol.cpp
-    MCSymbolELF.cpp
-    MCSymbolXCOFF.cpp
-    MCTargetOptions.cpp
-    MCTargetOptionsCommandFlags.cpp
-    MCValue.cpp
-    MCWasmObjectTargetWriter.cpp
-    MCWasmStreamer.cpp
-    MCWin64EH.cpp
-    MCWinCOFFStreamer.cpp
-    MCWinEH.cpp
-    MCXCOFFObjectTargetWriter.cpp
-    MCXCOFFStreamer.cpp
-    MachObjectWriter.cpp
-    StringTableBuilder.cpp
-    SubtargetFeature.cpp
-    WasmObjectWriter.cpp
-    WinCOFFObjectWriter.cpp
-    XCOFFObjectWriter.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Object/ya.make b/contrib/libs/llvm12/lib/Object/ya.make
deleted file mode 100644
index 3d746aaa362..00000000000
--- a/contrib/libs/llvm12/lib/Object/ya.make
+++ /dev/null
@@ -1,66 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/Bitcode/Reader
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCParser
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/TextAPI/MachO
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Object
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    Archive.cpp
-    ArchiveWriter.cpp
-    Binary.cpp
-    COFFImportFile.cpp
-    COFFModuleDefinition.cpp
-    COFFObjectFile.cpp
-    Decompressor.cpp
-    ELF.cpp
-    ELFObjectFile.cpp
-    Error.cpp
-    IRObjectFile.cpp
-    IRSymtab.cpp
-    MachOObjectFile.cpp
-    MachOUniversal.cpp
-    MachOUniversalWriter.cpp
-    Minidump.cpp
-    ModuleSymbolTable.cpp
-    Object.cpp
-    ObjectFile.cpp
-    RecordStreamer.cpp
-    RelocationResolver.cpp
-    SymbolSize.cpp
-    SymbolicFile.cpp
-    TapiFile.cpp
-    TapiUniversal.cpp
-    WasmObjectFile.cpp
-    WindowsMachineFlag.cpp
-    WindowsResource.cpp
-    XCOFFObjectFile.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/ProfileData/Coverage/ya.make b/contrib/libs/llvm12/lib/ProfileData/Coverage/ya.make
deleted file mode 100644
index 7485f519d12..00000000000
--- a/contrib/libs/llvm12/lib/ProfileData/Coverage/ya.make
+++ /dev/null
@@ -1,36 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/ProfileData
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/ProfileData/Coverage
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    CoverageMapping.cpp
-    CoverageMappingReader.cpp
-    CoverageMappingWriter.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/ProfileData/ya.make b/contrib/libs/llvm12/lib/ProfileData/ya.make
deleted file mode 100644
index 1c3b40612f2..00000000000
--- a/contrib/libs/llvm12/lib/ProfileData/ya.make
+++ /dev/null
@@ -1,41 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Demangle
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/ProfileData
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    GCOV.cpp
-    InstrProf.cpp
-    InstrProfReader.cpp
-    InstrProfWriter.cpp
-    ProfileSummaryBuilder.cpp
-    SampleProf.cpp
-    SampleProfReader.cpp
-    SampleProfWriter.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Remarks/ya.make b/contrib/libs/llvm12/lib/Remarks/ya.make
deleted file mode 100644
index 43080335772..00000000000
--- a/contrib/libs/llvm12/lib/Remarks/ya.make
+++ /dev/null
@@ -1,42 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/Bitstream/Reader
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Remarks
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    BitstreamRemarkParser.cpp
-    BitstreamRemarkSerializer.cpp
-    Remark.cpp
-    RemarkFormat.cpp
-    RemarkLinker.cpp
-    RemarkParser.cpp
-    RemarkSerializer.cpp
-    RemarkStreamer.cpp
-    RemarkStringTable.cpp
-    YAMLRemarkParser.cpp
-    YAMLRemarkSerializer.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Support/ya.make b/contrib/libs/llvm12/lib/Support/ya.make
deleted file mode 100644
index b3f49d0f2a7..00000000000
--- a/contrib/libs/llvm12/lib/Support/ya.make
+++ /dev/null
@@ -1,175 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(
-    Apache-2.0 WITH LLVM-exception AND
-    BSD-2-Clause AND
-    BSD-3-Clause AND
-    ISC AND
-    NCSA AND
-    Public-Domain AND
-    Spencer-94 AND
-    Unicode-Mappings
-)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/Demangle
-    contrib/libs/zlib
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Support
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AArch64TargetParser.cpp
-    ABIBreak.cpp
-    AMDGPUMetadata.cpp
-    APFixedPoint.cpp
-    APFloat.cpp
-    APInt.cpp
-    APSInt.cpp
-    ARMAttributeParser.cpp
-    ARMBuildAttrs.cpp
-    ARMTargetParser.cpp
-    ARMWinEH.cpp
-    Allocator.cpp
-    Atomic.cpp
-    BinaryStreamError.cpp
-    BinaryStreamReader.cpp
-    BinaryStreamRef.cpp
-    BinaryStreamWriter.cpp
-    BlockFrequency.cpp
-    BranchProbability.cpp
-    BuryPointer.cpp
-    COM.cpp
-    CRC.cpp
-    CachePruning.cpp
-    Chrono.cpp
-    CodeGenCoverage.cpp
-    CommandLine.cpp
-    Compression.cpp
-    ConvertUTF.cpp
-    ConvertUTFWrapper.cpp
-    CrashRecoveryContext.cpp
-    DAGDeltaAlgorithm.cpp
-    DJB.cpp
-    DataExtractor.cpp
-    Debug.cpp
-    DebugCounter.cpp
-    DeltaAlgorithm.cpp
-    DynamicLibrary.cpp
-    ELFAttributeParser.cpp
-    ELFAttributes.cpp
-    Errno.cpp
-    Error.cpp
-    ErrorHandling.cpp
-    ExtensibleRTTI.cpp
-    FileCollector.cpp
-    FileOutputBuffer.cpp
-    FileUtilities.cpp
-    FoldingSet.cpp
-    FormatVariadic.cpp
-    FormattedStream.cpp
-    GlobPattern.cpp
-    GraphWriter.cpp
-    Hashing.cpp
-    Host.cpp
-    InitLLVM.cpp
-    InstructionCost.cpp
-    IntEqClasses.cpp
-    IntervalMap.cpp
-    ItaniumManglingCanonicalizer.cpp
-    JSON.cpp
-    KnownBits.cpp
-    LEB128.cpp
-    LineIterator.cpp
-    Locale.cpp
-    LockFileManager.cpp
-    LowLevelType.cpp
-    MD5.cpp
-    ManagedStatic.cpp
-    MathExtras.cpp
-    MemAlloc.cpp
-    Memory.cpp
-    MemoryBuffer.cpp
-    MemoryBufferRef.cpp
-    NativeFormatting.cpp
-    OptimizedStructLayout.cpp
-    Optional.cpp
-    Parallel.cpp
-    Path.cpp
-    PluginLoader.cpp
-    PrettyStackTrace.cpp
-    Process.cpp
-    Program.cpp
-    RISCVAttributeParser.cpp
-    RISCVAttributes.cpp
-    RWMutex.cpp
-    RandomNumberGenerator.cpp
-    Regex.cpp
-    SHA1.cpp
-    ScaledNumber.cpp
-    ScopedPrinter.cpp
-    Signals.cpp
-    Signposts.cpp
-    SmallPtrSet.cpp
-    SmallVector.cpp
-    SourceMgr.cpp
-    SpecialCaseList.cpp
-    Statistic.cpp
-    StringExtras.cpp
-    StringMap.cpp
-    StringRef.cpp
-    StringSaver.cpp
-    SuffixTree.cpp
-    SymbolRemappingReader.cpp
-    SystemUtils.cpp
-    TarWriter.cpp
-    TargetParser.cpp
-    TargetRegistry.cpp
-    ThreadLocal.cpp
-    ThreadPool.cpp
-    Threading.cpp
-    TimeProfiler.cpp
-    Timer.cpp
-    ToolOutputFile.cpp
-    TrigramIndex.cpp
-    Triple.cpp
-    Twine.cpp
-    Unicode.cpp
-    UnicodeCaseFold.cpp
-    Valgrind.cpp
-    VersionTuple.cpp
-    VirtualFileSystem.cpp
-    Watchdog.cpp
-    WithColor.cpp
-    X86TargetParser.cpp
-    YAMLParser.cpp
-    YAMLTraits.cpp
-    Z3Solver.cpp
-    circular_raw_ostream.cpp
-    raw_os_ostream.cpp
-    raw_ostream.cpp
-    regcomp.c
-    regerror.c
-    regexec.c
-    regfree.c
-    regstrlcpy.c
-    xxhash.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/TableGen/ya.make b/contrib/libs/llvm12/lib/TableGen/ya.make
deleted file mode 100644
index a5ef0f22efa..00000000000
--- a/contrib/libs/llvm12/lib/TableGen/ya.make
+++ /dev/null
@@ -1,41 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/TableGen
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    DetailedRecordsBackend.cpp
-    Error.cpp
-    JSONBackend.cpp
-    Main.cpp
-    Record.cpp
-    SetTheory.cpp
-    StringMatcher.cpp
-    TGLexer.cpp
-    TGParser.cpp
-    TableGenBackend.cpp
-    TableGenBackendSkeleton.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/AArch64/AsmParser/ya.make b/contrib/libs/llvm12/lib/Target/AArch64/AsmParser/ya.make
deleted file mode 100644
index 512f510d853..00000000000
--- a/contrib/libs/llvm12/lib/Target/AArch64/AsmParser/ya.make
+++ /dev/null
@@ -1,39 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCParser
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
-    contrib/libs/llvm12/lib/Target/AArch64/Utils
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
-    contrib/libs/llvm12/lib/Target/AArch64
-    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AArch64AsmParser.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/AArch64/Disassembler/ya.make b/contrib/libs/llvm12/lib/Target/AArch64/Disassembler/ya.make
deleted file mode 100644
index 096b55cd68c..00000000000
--- a/contrib/libs/llvm12/lib/Target/AArch64/Disassembler/ya.make
+++ /dev/null
@@ -1,40 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCDisassembler
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
-    contrib/libs/llvm12/lib/Target/AArch64/Utils
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
-    contrib/libs/llvm12/lib/Target/AArch64
-    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AArch64Disassembler.cpp
-    AArch64ExternalSymbolizer.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc/ya.make b/contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc/ya.make
deleted file mode 100644
index 18b5c7460fd..00000000000
--- a/contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc/ya.make
+++ /dev/null
@@ -1,49 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
-    contrib/libs/llvm12/lib/Target/AArch64/Utils
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
-    contrib/libs/llvm12/lib/Target/AArch64
-    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AArch64AsmBackend.cpp
-    AArch64ELFObjectWriter.cpp
-    AArch64ELFStreamer.cpp
-    AArch64InstPrinter.cpp
-    AArch64MCAsmInfo.cpp
-    AArch64MCCodeEmitter.cpp
-    AArch64MCExpr.cpp
-    AArch64MCTargetDesc.cpp
-    AArch64MachObjectWriter.cpp
-    AArch64TargetStreamer.cpp
-    AArch64WinCOFFObjectWriter.cpp
-    AArch64WinCOFFStreamer.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/AArch64/TargetInfo/ya.make b/contrib/libs/llvm12/lib/Target/AArch64/TargetInfo/ya.make
deleted file mode 100644
index bb7d4a2c890..00000000000
--- a/contrib/libs/llvm12/lib/Target/AArch64/TargetInfo/ya.make
+++ /dev/null
@@ -1,32 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Target/AArch64
-    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AArch64TargetInfo.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/AArch64/Utils/ya.make b/contrib/libs/llvm12/lib/Target/AArch64/Utils/ya.make
deleted file mode 100644
index 3668c2a6509..00000000000
--- a/contrib/libs/llvm12/lib/Target/AArch64/Utils/ya.make
+++ /dev/null
@@ -1,34 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
-    contrib/libs/llvm12/lib/Target/AArch64
-    contrib/libs/llvm12/lib/Target/AArch64/Utils
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AArch64BaseInfo.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/AArch64/ya.make b/contrib/libs/llvm12/lib/Target/AArch64/ya.make
deleted file mode 100644
index 244cbc7f34f..00000000000
--- a/contrib/libs/llvm12/lib/Target/AArch64/ya.make
+++ /dev/null
@@ -1,98 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(
-    Apache-2.0 WITH LLVM-exception AND
-    NCSA
-)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/CodeGen
-    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
-    contrib/libs/llvm12/lib/CodeGen/GlobalISel
-    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target
-    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
-    contrib/libs/llvm12/lib/Target/AArch64/Utils
-    contrib/libs/llvm12/lib/Transforms/CFGuard
-    contrib/libs/llvm12/lib/Transforms/Scalar
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/AArch64
-    contrib/libs/llvm12/lib/Target/AArch64
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AArch64A53Fix835769.cpp
-    AArch64A57FPLoadBalancing.cpp
-    AArch64AdvSIMDScalarPass.cpp
-    AArch64AsmPrinter.cpp
-    AArch64BranchTargets.cpp
-    AArch64CallingConvention.cpp
-    AArch64CleanupLocalDynamicTLSPass.cpp
-    AArch64CollectLOH.cpp
-    AArch64CompressJumpTables.cpp
-    AArch64CondBrTuning.cpp
-    AArch64ConditionOptimizer.cpp
-    AArch64ConditionalCompares.cpp
-    AArch64DeadRegisterDefinitionsPass.cpp
-    AArch64ExpandImm.cpp
-    AArch64ExpandPseudoInsts.cpp
-    AArch64FalkorHWPFFix.cpp
-    AArch64FastISel.cpp
-    AArch64FrameLowering.cpp
-    AArch64ISelDAGToDAG.cpp
-    AArch64ISelLowering.cpp
-    AArch64InstrInfo.cpp
-    AArch64LoadStoreOptimizer.cpp
-    AArch64MCInstLower.cpp
-    AArch64MachineFunctionInfo.cpp
-    AArch64MacroFusion.cpp
-    AArch64PBQPRegAlloc.cpp
-    AArch64PromoteConstant.cpp
-    AArch64RedundantCopyElimination.cpp
-    AArch64RegisterInfo.cpp
-    AArch64SIMDInstrOpt.cpp
-    AArch64SLSHardening.cpp
-    AArch64SelectionDAGInfo.cpp
-    AArch64SpeculationHardening.cpp
-    AArch64StackTagging.cpp
-    AArch64StackTaggingPreRA.cpp
-    AArch64StorePairSuppress.cpp
-    AArch64Subtarget.cpp
-    AArch64TargetMachine.cpp
-    AArch64TargetObjectFile.cpp
-    AArch64TargetTransformInfo.cpp
-    GISel/AArch64CallLowering.cpp
-    GISel/AArch64InstructionSelector.cpp
-    GISel/AArch64LegalizerInfo.cpp
-    GISel/AArch64PostLegalizerCombiner.cpp
-    GISel/AArch64PostLegalizerLowering.cpp
-    GISel/AArch64PostSelectOptimize.cpp
-    GISel/AArch64PreLegalizerCombiner.cpp
-    GISel/AArch64RegisterBankInfo.cpp
-    SVEIntrinsicOpts.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/ARM/AsmParser/ya.make b/contrib/libs/llvm12/lib/Target/ARM/AsmParser/ya.make
deleted file mode 100644
index 572d301570d..00000000000
--- a/contrib/libs/llvm12/lib/Target/ARM/AsmParser/ya.make
+++ /dev/null
@@ -1,39 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCParser
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
-    contrib/libs/llvm12/lib/Target/ARM/Utils
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM
-    contrib/libs/llvm12/lib/Target/ARM
-    contrib/libs/llvm12/lib/Target/ARM/AsmParser
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    ARMAsmParser.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/ARM/Disassembler/ya.make b/contrib/libs/llvm12/lib/Target/ARM/Disassembler/ya.make
deleted file mode 100644
index f8ce0c24d92..00000000000
--- a/contrib/libs/llvm12/lib/Target/ARM/Disassembler/ya.make
+++ /dev/null
@@ -1,38 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/MC/MCDisassembler
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
-    contrib/libs/llvm12/lib/Target/ARM/Utils
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM
-    contrib/libs/llvm12/lib/Target/ARM
-    contrib/libs/llvm12/lib/Target/ARM/Disassembler
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    ARMDisassembler.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc/ya.make b/contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc/ya.make
deleted file mode 100644
index b92b47d0572..00000000000
--- a/contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc/ya.make
+++ /dev/null
@@ -1,52 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCDisassembler
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
-    contrib/libs/llvm12/lib/Target/ARM/Utils
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM
-    contrib/libs/llvm12/lib/Target/ARM
-    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    ARMAsmBackend.cpp
-    ARMELFObjectWriter.cpp
-    ARMELFStreamer.cpp
-    ARMInstPrinter.cpp
-    ARMMCAsmInfo.cpp
-    ARMMCCodeEmitter.cpp
-    ARMMCExpr.cpp
-    ARMMCTargetDesc.cpp
-    ARMMachORelocationInfo.cpp
-    ARMMachObjectWriter.cpp
-    ARMTargetStreamer.cpp
-    ARMUnwindOpAsm.cpp
-    ARMWinCOFFObjectWriter.cpp
-    ARMWinCOFFStreamer.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/ARM/TargetInfo/ya.make b/contrib/libs/llvm12/lib/Target/ARM/TargetInfo/ya.make
deleted file mode 100644
index 089e7bf2069..00000000000
--- a/contrib/libs/llvm12/lib/Target/ARM/TargetInfo/ya.make
+++ /dev/null
@@ -1,32 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Target/ARM
-    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    ARMTargetInfo.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/ARM/Utils/ya.make b/contrib/libs/llvm12/lib/Target/ARM/Utils/ya.make
deleted file mode 100644
index 7a980b708c3..00000000000
--- a/contrib/libs/llvm12/lib/Target/ARM/Utils/ya.make
+++ /dev/null
@@ -1,34 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM
-    contrib/libs/llvm12/lib/Target/ARM
-    contrib/libs/llvm12/lib/Target/ARM/Utils
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    ARMBaseInfo.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/ARM/ya.make b/contrib/libs/llvm12/lib/Target/ARM/ya.make
deleted file mode 100644
index 9551f9f11bb..00000000000
--- a/contrib/libs/llvm12/lib/Target/ARM/ya.make
+++ /dev/null
@@ -1,91 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/CodeGen
-    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
-    contrib/libs/llvm12/lib/CodeGen/GlobalISel
-    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target
-    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
-    contrib/libs/llvm12/lib/Target/ARM/Utils
-    contrib/libs/llvm12/lib/Transforms/CFGuard
-    contrib/libs/llvm12/lib/Transforms/Scalar
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/ARM
-    contrib/libs/llvm12/lib/Target/ARM
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    A15SDOptimizer.cpp
-    ARMAsmPrinter.cpp
-    ARMBaseInstrInfo.cpp
-    ARMBaseRegisterInfo.cpp
-    ARMBasicBlockInfo.cpp
-    ARMBlockPlacement.cpp
-    ARMCallLowering.cpp
-    ARMCallingConv.cpp
-    ARMConstantIslandPass.cpp
-    ARMConstantPoolValue.cpp
-    ARMExpandPseudoInsts.cpp
-    ARMFastISel.cpp
-    ARMFrameLowering.cpp
-    ARMHazardRecognizer.cpp
-    ARMISelDAGToDAG.cpp
-    ARMISelLowering.cpp
-    ARMInstrInfo.cpp
-    ARMInstructionSelector.cpp
-    ARMLegalizerInfo.cpp
-    ARMLoadStoreOptimizer.cpp
-    ARMLowOverheadLoops.cpp
-    ARMMCInstLower.cpp
-    ARMMachineFunctionInfo.cpp
-    ARMMacroFusion.cpp
-    ARMOptimizeBarriersPass.cpp
-    ARMParallelDSP.cpp
-    ARMRegisterBankInfo.cpp
-    ARMRegisterInfo.cpp
-    ARMSLSHardening.cpp
-    ARMSelectionDAGInfo.cpp
-    ARMSubtarget.cpp
-    ARMTargetMachine.cpp
-    ARMTargetObjectFile.cpp
-    ARMTargetTransformInfo.cpp
-    MLxExpansionPass.cpp
-    MVEGatherScatterLowering.cpp
-    MVETailPredication.cpp
-    MVEVPTBlockPass.cpp
-    MVEVPTOptimisationsPass.cpp
-    Thumb1FrameLowering.cpp
-    Thumb1InstrInfo.cpp
-    Thumb2ITBlockPass.cpp
-    Thumb2InstrInfo.cpp
-    Thumb2SizeReduction.cpp
-    ThumbRegisterInfo.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/BPF/AsmParser/ya.make b/contrib/libs/llvm12/lib/Target/BPF/AsmParser/ya.make
deleted file mode 100644
index b61ac06cdd2..00000000000
--- a/contrib/libs/llvm12/lib/Target/BPF/AsmParser/ya.make
+++ /dev/null
@@ -1,38 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCParser
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF
-    contrib/libs/llvm12/lib/Target/BPF
-    contrib/libs/llvm12/lib/Target/BPF/AsmParser
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    BPFAsmParser.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/BPF/Disassembler/ya.make b/contrib/libs/llvm12/lib/Target/BPF/Disassembler/ya.make
deleted file mode 100644
index cb7872eeeeb..00000000000
--- a/contrib/libs/llvm12/lib/Target/BPF/Disassembler/ya.make
+++ /dev/null
@@ -1,36 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/MC/MCDisassembler
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF
-    contrib/libs/llvm12/lib/Target/BPF
-    contrib/libs/llvm12/lib/Target/BPF/Disassembler
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    BPFDisassembler.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc/ya.make b/contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc/ya.make
deleted file mode 100644
index 6522c7ef00c..00000000000
--- a/contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc/ya.make
+++ /dev/null
@@ -1,40 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF
-    contrib/libs/llvm12/lib/Target/BPF
-    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    BPFAsmBackend.cpp
-    BPFELFObjectWriter.cpp
-    BPFInstPrinter.cpp
-    BPFMCCodeEmitter.cpp
-    BPFMCTargetDesc.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/BPF/TargetInfo/ya.make b/contrib/libs/llvm12/lib/Target/BPF/TargetInfo/ya.make
deleted file mode 100644
index 3a882dad3ef..00000000000
--- a/contrib/libs/llvm12/lib/Target/BPF/TargetInfo/ya.make
+++ /dev/null
@@ -1,32 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Target/BPF
-    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    BPFTargetInfo.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/BPF/ya.make b/contrib/libs/llvm12/lib/Target/BPF/ya.make
deleted file mode 100644
index 0f122e4afe2..00000000000
--- a/contrib/libs/llvm12/lib/Target/BPF/ya.make
+++ /dev/null
@@ -1,62 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/CodeGen
-    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
-    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target
-    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
-    contrib/libs/llvm12/lib/Transforms/IPO
-    contrib/libs/llvm12/lib/Transforms/Scalar
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/BPF
-    contrib/libs/llvm12/lib/Target/BPF
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    BPFAbstractMemberAccess.cpp
-    BPFAdjustOpt.cpp
-    BPFAsmPrinter.cpp
-    BPFCheckAndAdjustIR.cpp
-    BPFFrameLowering.cpp
-    BPFISelDAGToDAG.cpp
-    BPFISelLowering.cpp
-    BPFInstrInfo.cpp
-    BPFMCInstLower.cpp
-    BPFMIChecking.cpp
-    BPFMIPeephole.cpp
-    BPFMISimplifyPatchable.cpp
-    BPFPreserveDIType.cpp
-    BPFRegisterInfo.cpp
-    BPFSelectionDAGInfo.cpp
-    BPFSubtarget.cpp
-    BPFTargetMachine.cpp
-    BTFDebug.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc/ya.make b/contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc/ya.make
deleted file mode 100644
index 81ad30663e7..00000000000
--- a/contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc/ya.make
+++ /dev/null
@@ -1,39 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX
-    contrib/libs/llvm12/lib/Target/NVPTX
-    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    NVPTXInstPrinter.cpp
-    NVPTXMCAsmInfo.cpp
-    NVPTXMCTargetDesc.cpp
-    NVPTXTargetStreamer.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo/ya.make b/contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo/ya.make
deleted file mode 100644
index 52ef1e5f5ba..00000000000
--- a/contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo/ya.make
+++ /dev/null
@@ -1,32 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Target/NVPTX
-    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    NVPTXTargetInfo.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/NVPTX/ya.make b/contrib/libs/llvm12/lib/Target/NVPTX/ya.make
deleted file mode 100644
index 4f7542eb652..00000000000
--- a/contrib/libs/llvm12/lib/Target/NVPTX/ya.make
+++ /dev/null
@@ -1,69 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/CodeGen
-    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
-    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target
-    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
-    contrib/libs/llvm12/lib/Transforms/IPO
-    contrib/libs/llvm12/lib/Transforms/Scalar
-    contrib/libs/llvm12/lib/Transforms/Utils
-    contrib/libs/llvm12/lib/Transforms/Vectorize
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/NVPTX
-    contrib/libs/llvm12/lib/Target/NVPTX
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    NVPTXAllocaHoisting.cpp
-    NVPTXAsmPrinter.cpp
-    NVPTXAssignValidGlobalNames.cpp
-    NVPTXFrameLowering.cpp
-    NVPTXGenericToNVVM.cpp
-    NVPTXISelDAGToDAG.cpp
-    NVPTXISelLowering.cpp
-    NVPTXImageOptimizer.cpp
-    NVPTXInstrInfo.cpp
-    NVPTXLowerAggrCopies.cpp
-    NVPTXLowerAlloca.cpp
-    NVPTXLowerArgs.cpp
-    NVPTXMCExpr.cpp
-    NVPTXPeephole.cpp
-    NVPTXPrologEpilogPass.cpp
-    NVPTXProxyRegErasure.cpp
-    NVPTXRegisterInfo.cpp
-    NVPTXReplaceImageHandles.cpp
-    NVPTXSubtarget.cpp
-    NVPTXTargetMachine.cpp
-    NVPTXTargetTransformInfo.cpp
-    NVPTXUtilities.cpp
-    NVVMIntrRange.cpp
-    NVVMReflect.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/PowerPC/AsmParser/ya.make b/contrib/libs/llvm12/lib/Target/PowerPC/AsmParser/ya.make
deleted file mode 100644
index 24183440dc2..00000000000
--- a/contrib/libs/llvm12/lib/Target/PowerPC/AsmParser/ya.make
+++ /dev/null
@@ -1,38 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCParser
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC
-    contrib/libs/llvm12/lib/Target/PowerPC
-    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    PPCAsmParser.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/PowerPC/Disassembler/ya.make b/contrib/libs/llvm12/lib/Target/PowerPC/Disassembler/ya.make
deleted file mode 100644
index a412740df21..00000000000
--- a/contrib/libs/llvm12/lib/Target/PowerPC/Disassembler/ya.make
+++ /dev/null
@@ -1,36 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/MC/MCDisassembler
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC
-    contrib/libs/llvm12/lib/Target/PowerPC
-    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    PPCDisassembler.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc/ya.make b/contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc/ya.make
deleted file mode 100644
index 903dc6ec7f7..00000000000
--- a/contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc/ya.make
+++ /dev/null
@@ -1,49 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(
-    Apache-2.0 WITH LLVM-exception AND
-    NCSA
-)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC
-    contrib/libs/llvm12/lib/Target/PowerPC
-    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    PPCAsmBackend.cpp
-    PPCELFObjectWriter.cpp
-    PPCELFStreamer.cpp
-    PPCInstPrinter.cpp
-    PPCMCAsmInfo.cpp
-    PPCMCCodeEmitter.cpp
-    PPCMCExpr.cpp
-    PPCMCTargetDesc.cpp
-    PPCPredicates.cpp
-    PPCXCOFFObjectWriter.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo/ya.make b/contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo/ya.make
deleted file mode 100644
index 68badb4490f..00000000000
--- a/contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo/ya.make
+++ /dev/null
@@ -1,32 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Target/PowerPC
-    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    PowerPCTargetInfo.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/PowerPC/ya.make b/contrib/libs/llvm12/lib/Target/PowerPC/ya.make
deleted file mode 100644
index 8c7039a5758..00000000000
--- a/contrib/libs/llvm12/lib/Target/PowerPC/ya.make
+++ /dev/null
@@ -1,83 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/CodeGen
-    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
-    contrib/libs/llvm12/lib/CodeGen/GlobalISel
-    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target
-    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
-    contrib/libs/llvm12/lib/Transforms/Scalar
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/PowerPC
-    contrib/libs/llvm12/lib/Target/PowerPC
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    GISel/PPCCallLowering.cpp
-    GISel/PPCInstructionSelector.cpp
-    GISel/PPCLegalizerInfo.cpp
-    GISel/PPCRegisterBankInfo.cpp
-    PPCAsmPrinter.cpp
-    PPCBoolRetToInt.cpp
-    PPCBranchCoalescing.cpp
-    PPCBranchSelector.cpp
-    PPCCCState.cpp
-    PPCCTRLoops.cpp
-    PPCCallingConv.cpp
-    PPCEarlyReturn.cpp
-    PPCExpandISEL.cpp
-    PPCFastISel.cpp
-    PPCFrameLowering.cpp
-    PPCHazardRecognizers.cpp
-    PPCISelDAGToDAG.cpp
-    PPCISelLowering.cpp
-    PPCInstrInfo.cpp
-    PPCLoopInstrFormPrep.cpp
-    PPCLowerMASSVEntries.cpp
-    PPCMCInstLower.cpp
-    PPCMIPeephole.cpp
-    PPCMachineFunctionInfo.cpp
-    PPCMachineScheduler.cpp
-    PPCMacroFusion.cpp
-    PPCPreEmitPeephole.cpp
-    PPCReduceCRLogicals.cpp
-    PPCRegisterInfo.cpp
-    PPCSubtarget.cpp
-    PPCTLSDynamicCall.cpp
-    PPCTOCRegDeps.cpp
-    PPCTargetMachine.cpp
-    PPCTargetObjectFile.cpp
-    PPCTargetTransformInfo.cpp
-    PPCVSXCopy.cpp
-    PPCVSXFMAMutate.cpp
-    PPCVSXSwapRemoval.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/X86/AsmParser/ya.make b/contrib/libs/llvm12/lib/Target/X86/AsmParser/ya.make
deleted file mode 100644
index f88283f4e55..00000000000
--- a/contrib/libs/llvm12/lib/Target/X86/AsmParser/ya.make
+++ /dev/null
@@ -1,38 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCParser
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/X86/TargetInfo
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86
-    contrib/libs/llvm12/lib/Target/X86
-    contrib/libs/llvm12/lib/Target/X86/AsmParser
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    X86AsmParser.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/X86/Disassembler/ya.make b/contrib/libs/llvm12/lib/Target/X86/Disassembler/ya.make
deleted file mode 100644
index b55833692f9..00000000000
--- a/contrib/libs/llvm12/lib/Target/X86/Disassembler/ya.make
+++ /dev/null
@@ -1,36 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/MC/MCDisassembler
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/X86/TargetInfo
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86
-    contrib/libs/llvm12/lib/Target/X86
-    contrib/libs/llvm12/lib/Target/X86/Disassembler
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    X86Disassembler.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/X86/MCTargetDesc/ya.make b/contrib/libs/llvm12/lib/Target/X86/MCTargetDesc/ya.make
deleted file mode 100644
index 8da0d02f5b7..00000000000
--- a/contrib/libs/llvm12/lib/Target/X86/MCTargetDesc/ya.make
+++ /dev/null
@@ -1,51 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCDisassembler
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/X86/TargetInfo
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86
-    contrib/libs/llvm12/lib/Target/X86
-    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    X86ATTInstPrinter.cpp
-    X86AsmBackend.cpp
-    X86ELFObjectWriter.cpp
-    X86InstComments.cpp
-    X86InstPrinterCommon.cpp
-    X86IntelInstPrinter.cpp
-    X86MCAsmInfo.cpp
-    X86MCCodeEmitter.cpp
-    X86MCTargetDesc.cpp
-    X86MachObjectWriter.cpp
-    X86ShuffleDecode.cpp
-    X86WinCOFFObjectWriter.cpp
-    X86WinCOFFStreamer.cpp
-    X86WinCOFFTargetStreamer.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/X86/TargetInfo/ya.make b/contrib/libs/llvm12/lib/Target/X86/TargetInfo/ya.make
deleted file mode 100644
index 2f30db941ed..00000000000
--- a/contrib/libs/llvm12/lib/Target/X86/TargetInfo/ya.make
+++ /dev/null
@@ -1,32 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Target/X86
-    contrib/libs/llvm12/lib/Target/X86/TargetInfo
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    X86TargetInfo.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/X86/ya.make b/contrib/libs/llvm12/lib/Target/X86/ya.make
deleted file mode 100644
index 1df03a55e7e..00000000000
--- a/contrib/libs/llvm12/lib/Target/X86/ya.make
+++ /dev/null
@@ -1,104 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(
-    Apache-2.0 WITH LLVM-exception AND
-    NCSA
-)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/CodeGen
-    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
-    contrib/libs/llvm12/lib/CodeGen/GlobalISel
-    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/ProfileData
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target
-    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/X86/TargetInfo
-    contrib/libs/llvm12/lib/Transforms/CFGuard
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/Target/X86
-    contrib/libs/llvm12/lib/Target/X86
-)
-
-NO_CLANG_COVERAGE()
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    X86AsmPrinter.cpp
-    X86AvoidStoreForwardingBlocks.cpp
-    X86AvoidTrailingCall.cpp
-    X86CallFrameOptimization.cpp
-    X86CallLowering.cpp
-    X86CallingConv.cpp
-    X86CmovConversion.cpp
-    X86DiscriminateMemOps.cpp
-    X86DomainReassignment.cpp
-    X86EvexToVex.cpp
-    X86ExpandPseudo.cpp
-    X86FastISel.cpp
-    X86FixupBWInsts.cpp
-    X86FixupLEAs.cpp
-    X86FixupSetCC.cpp
-    X86FlagsCopyLowering.cpp
-    X86FloatingPoint.cpp
-    X86FrameLowering.cpp
-    X86ISelDAGToDAG.cpp
-    X86ISelLowering.cpp
-    X86IndirectBranchTracking.cpp
-    X86IndirectThunks.cpp
-    X86InsertPrefetch.cpp
-    X86InsertWait.cpp
-    X86InstCombineIntrinsic.cpp
-    X86InstrFMA3Info.cpp
-    X86InstrFoldTables.cpp
-    X86InstrInfo.cpp
-    X86InstructionSelector.cpp
-    X86InterleavedAccess.cpp
-    X86LegalizerInfo.cpp
-    X86LoadValueInjectionLoadHardening.cpp
-    X86LoadValueInjectionRetHardening.cpp
-    X86LowerAMXType.cpp
-    X86MCInstLower.cpp
-    X86MachineFunctionInfo.cpp
-    X86MacroFusion.cpp
-    X86OptimizeLEAs.cpp
-    X86PadShortFunction.cpp
-    X86PartialReduction.cpp
-    X86PreTileConfig.cpp
-    X86RegisterBankInfo.cpp
-    X86RegisterInfo.cpp
-    X86SelectionDAGInfo.cpp
-    X86ShuffleDecodeConstantPool.cpp
-    X86SpeculativeExecutionSideEffectSuppression.cpp
-    X86SpeculativeLoadHardening.cpp
-    X86Subtarget.cpp
-    X86TargetMachine.cpp
-    X86TargetObjectFile.cpp
-    X86TargetTransformInfo.cpp
-    X86TileConfig.cpp
-    X86VZeroUpper.cpp
-    X86WinAllocaExpander.cpp
-    X86WinEHState.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Target/ya.make b/contrib/libs/llvm12/lib/Target/ya.make
deleted file mode 100644
index 84014564299..00000000000
--- a/contrib/libs/llvm12/lib/Target/ya.make
+++ /dev/null
@@ -1,39 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Target
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    Target.cpp
-    TargetIntrinsicInfo.cpp
-    TargetLoweringObjectFile.cpp
-    TargetMachine.cpp
-    TargetMachineC.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/TextAPI/MachO/ya.make b/contrib/libs/llvm12/lib/TextAPI/MachO/ya.make
deleted file mode 100644
index 4631a5ed631..00000000000
--- a/contrib/libs/llvm12/lib/TextAPI/MachO/ya.make
+++ /dev/null
@@ -1,40 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/TextAPI
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    Architecture.cpp
-    ArchitectureSet.cpp
-    InterfaceFile.cpp
-    PackedVersion.cpp
-    Platform.cpp
-    Symbol.cpp
-    Target.cpp
-    TextStub.cpp
-    TextStubCommon.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/ya.make b/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/ya.make
deleted file mode 100644
index 3de52a0add3..00000000000
--- a/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool/ya.make
+++ /dev/null
@@ -1,35 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Option
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool
-    contrib/libs/llvm12/lib/ToolDrivers/llvm-dlltool
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    DlltoolDriver.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/ya.make b/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/ya.make
deleted file mode 100644
index cbe474770c1..00000000000
--- a/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib/ya.make
+++ /dev/null
@@ -1,37 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/Bitcode/Reader
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Option
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/lib/ToolDrivers/llvm-lib
-    contrib/libs/llvm12/lib/ToolDrivers/llvm-lib
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    LibDriver.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine/ya.make b/contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine/ya.make
deleted file mode 100644
index c472a2054ae..00000000000
--- a/contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine/ya.make
+++ /dev/null
@@ -1,36 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AggressiveInstCombine.cpp
-    TruncInstCombine.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Transforms/CFGuard/ya.make b/contrib/libs/llvm12/lib/Transforms/CFGuard/ya.make
deleted file mode 100644
index 37fe9ccc94a..00000000000
--- a/contrib/libs/llvm12/lib/Transforms/CFGuard/ya.make
+++ /dev/null
@@ -1,33 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Transforms/CFGuard
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    CFGuard.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Transforms/IPO/ya.make b/contrib/libs/llvm12/lib/Transforms/IPO/ya.make
deleted file mode 100644
index 5b078050fe9..00000000000
--- a/contrib/libs/llvm12/lib/Transforms/IPO/ya.make
+++ /dev/null
@@ -1,88 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/Bitcode/Reader
-    contrib/libs/llvm12/lib/Bitcode/Writer
-    contrib/libs/llvm12/lib/Frontend/OpenMP
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/IRReader
-    contrib/libs/llvm12/lib/Linker
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/ProfileData
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
-    contrib/libs/llvm12/lib/Transforms/InstCombine
-    contrib/libs/llvm12/lib/Transforms/Instrumentation
-    contrib/libs/llvm12/lib/Transforms/Scalar
-    contrib/libs/llvm12/lib/Transforms/Utils
-    contrib/libs/llvm12/lib/Transforms/Vectorize
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Transforms/IPO
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AlwaysInliner.cpp
-    Annotation2Metadata.cpp
-    ArgumentPromotion.cpp
-    Attributor.cpp
-    AttributorAttributes.cpp
-    BarrierNoopPass.cpp
-    BlockExtractor.cpp
-    CalledValuePropagation.cpp
-    ConstantMerge.cpp
-    CrossDSOCFI.cpp
-    DeadArgumentElimination.cpp
-    ElimAvailExtern.cpp
-    ExtractGV.cpp
-    ForceFunctionAttrs.cpp
-    FunctionAttrs.cpp
-    FunctionImport.cpp
-    GlobalDCE.cpp
-    GlobalOpt.cpp
-    GlobalSplit.cpp
-    HotColdSplitting.cpp
-    IPO.cpp
-    IROutliner.cpp
-    InferFunctionAttrs.cpp
-    InlineSimple.cpp
-    Inliner.cpp
-    Internalize.cpp
-    LoopExtractor.cpp
-    LowerTypeTests.cpp
-    MergeFunctions.cpp
-    OpenMPOpt.cpp
-    PartialInlining.cpp
-    PassManagerBuilder.cpp
-    PruneEH.cpp
-    SCCP.cpp
-    SampleContextTracker.cpp
-    SampleProfile.cpp
-    SampleProfileProbe.cpp
-    StripDeadPrototypes.cpp
-    StripSymbols.cpp
-    SyntheticCountsPropagation.cpp
-    ThinLTOBitcodeWriter.cpp
-    WholeProgramDevirt.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Transforms/InstCombine/ya.make b/contrib/libs/llvm12/lib/Transforms/InstCombine/ya.make
deleted file mode 100644
index 3f74e68d16f..00000000000
--- a/contrib/libs/llvm12/lib/Transforms/InstCombine/ya.make
+++ /dev/null
@@ -1,49 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Transforms/InstCombine
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    InstCombineAddSub.cpp
-    InstCombineAndOrXor.cpp
-    InstCombineAtomicRMW.cpp
-    InstCombineCalls.cpp
-    InstCombineCasts.cpp
-    InstCombineCompares.cpp
-    InstCombineLoadStoreAlloca.cpp
-    InstCombineMulDivRem.cpp
-    InstCombineNegator.cpp
-    InstCombinePHI.cpp
-    InstCombineSelect.cpp
-    InstCombineShifts.cpp
-    InstCombineSimplifyDemanded.cpp
-    InstCombineVectorOps.cpp
-    InstructionCombining.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Transforms/Instrumentation/ya.make b/contrib/libs/llvm12/lib/Transforms/Instrumentation/ya.make
deleted file mode 100644
index 39dab1eb7d3..00000000000
--- a/contrib/libs/llvm12/lib/Transforms/Instrumentation/ya.make
+++ /dev/null
@@ -1,58 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(
-    Apache-2.0 WITH LLVM-exception AND
-    NCSA
-)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/ProfileData
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Transforms/Instrumentation
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AddressSanitizer.cpp
-    BoundsChecking.cpp
-    CGProfile.cpp
-    ControlHeightReduction.cpp
-    DataFlowSanitizer.cpp
-    GCOVProfiling.cpp
-    HWAddressSanitizer.cpp
-    IndirectCallPromotion.cpp
-    InstrOrderFile.cpp
-    InstrProfiling.cpp
-    Instrumentation.cpp
-    MemProfiler.cpp
-    MemorySanitizer.cpp
-    PGOInstrumentation.cpp
-    PGOMemOPSizeOpt.cpp
-    PoisonChecking.cpp
-    SanitizerCoverage.cpp
-    ThreadSanitizer.cpp
-    ValueProfileCollector.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Transforms/ObjCARC/ya.make b/contrib/libs/llvm12/lib/Transforms/ObjCARC/ya.make
deleted file mode 100644
index 727ec42c3f7..00000000000
--- a/contrib/libs/llvm12/lib/Transforms/ObjCARC/ya.make
+++ /dev/null
@@ -1,43 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Transforms/ObjCARC
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    DependencyAnalysis.cpp
-    ObjCARC.cpp
-    ObjCARCAPElim.cpp
-    ObjCARCContract.cpp
-    ObjCARCExpand.cpp
-    ObjCARCOpts.cpp
-    ProvenanceAnalysis.cpp
-    ProvenanceAnalysisEvaluator.cpp
-    PtrState.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Transforms/Scalar/ya.make b/contrib/libs/llvm12/lib/Transforms/Scalar/ya.make
deleted file mode 100644
index 75501ae81af..00000000000
--- a/contrib/libs/llvm12/lib/Transforms/Scalar/ya.make
+++ /dev/null
@@ -1,114 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
-    contrib/libs/llvm12/lib/Transforms/InstCombine
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Transforms/Scalar
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    ADCE.cpp
-    AlignmentFromAssumptions.cpp
-    AnnotationRemarks.cpp
-    BDCE.cpp
-    CallSiteSplitting.cpp
-    ConstantHoisting.cpp
-    ConstraintElimination.cpp
-    CorrelatedValuePropagation.cpp
-    DCE.cpp
-    DeadStoreElimination.cpp
-    DivRemPairs.cpp
-    EarlyCSE.cpp
-    FlattenCFGPass.cpp
-    Float2Int.cpp
-    GVN.cpp
-    GVNHoist.cpp
-    GVNSink.cpp
-    GuardWidening.cpp
-    IVUsersPrinter.cpp
-    IndVarSimplify.cpp
-    InductiveRangeCheckElimination.cpp
-    InferAddressSpaces.cpp
-    InstSimplifyPass.cpp
-    JumpThreading.cpp
-    LICM.cpp
-    LoopAccessAnalysisPrinter.cpp
-    LoopDataPrefetch.cpp
-    LoopDeletion.cpp
-    LoopDistribute.cpp
-    LoopFlatten.cpp
-    LoopFuse.cpp
-    LoopIdiomRecognize.cpp
-    LoopInstSimplify.cpp
-    LoopInterchange.cpp
-    LoopLoadElimination.cpp
-    LoopPassManager.cpp
-    LoopPredication.cpp
-    LoopRerollPass.cpp
-    LoopRotation.cpp
-    LoopSimplifyCFG.cpp
-    LoopSink.cpp
-    LoopStrengthReduce.cpp
-    LoopUnrollAndJamPass.cpp
-    LoopUnrollPass.cpp
-    LoopUnswitch.cpp
-    LoopVersioningLICM.cpp
-    LowerAtomic.cpp
-    LowerConstantIntrinsics.cpp
-    LowerExpectIntrinsic.cpp
-    LowerGuardIntrinsic.cpp
-    LowerMatrixIntrinsics.cpp
-    LowerWidenableCondition.cpp
-    MakeGuardsExplicit.cpp
-    MemCpyOptimizer.cpp
-    MergeICmps.cpp
-    MergedLoadStoreMotion.cpp
-    NaryReassociate.cpp
-    NewGVN.cpp
-    PartiallyInlineLibCalls.cpp
-    PlaceSafepoints.cpp
-    Reassociate.cpp
-    Reg2Mem.cpp
-    RewriteStatepointsForGC.cpp
-    SCCP.cpp
-    SROA.cpp
-    Scalar.cpp
-    ScalarizeMaskedMemIntrin.cpp
-    Scalarizer.cpp
-    SeparateConstOffsetFromGEP.cpp
-    SimpleLoopUnswitch.cpp
-    SimplifyCFGPass.cpp
-    Sink.cpp
-    SpeculateAroundPHIs.cpp
-    SpeculativeExecution.cpp
-    StraightLineStrengthReduce.cpp
-    StructurizeCFG.cpp
-    TailRecursionElimination.cpp
-    WarnMissedTransforms.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Transforms/Utils/ya.make b/contrib/libs/llvm12/lib/Transforms/Utils/ya.make
deleted file mode 100644
index c07d5d6db63..00000000000
--- a/contrib/libs/llvm12/lib/Transforms/Utils/ya.make
+++ /dev/null
@@ -1,104 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AMDGPUEmitPrintf.cpp
-    ASanStackFrameLayout.cpp
-    AddDiscriminators.cpp
-    AssumeBundleBuilder.cpp
-    BasicBlockUtils.cpp
-    BreakCriticalEdges.cpp
-    BuildLibCalls.cpp
-    BypassSlowDivision.cpp
-    CallGraphUpdater.cpp
-    CallPromotionUtils.cpp
-    CanonicalizeAliases.cpp
-    CanonicalizeFreezeInLoops.cpp
-    CloneFunction.cpp
-    CloneModule.cpp
-    CodeExtractor.cpp
-    CodeMoverUtils.cpp
-    CtorUtils.cpp
-    Debugify.cpp
-    DemoteRegToStack.cpp
-    EntryExitInstrumenter.cpp
-    EscapeEnumerator.cpp
-    Evaluator.cpp
-    FixIrreducible.cpp
-    FlattenCFG.cpp
-    FunctionComparator.cpp
-    FunctionImportUtils.cpp
-    GlobalStatus.cpp
-    GuardUtils.cpp
-    InjectTLIMappings.cpp
-    InlineFunction.cpp
-    InstructionNamer.cpp
-    IntegerDivision.cpp
-    LCSSA.cpp
-    LibCallsShrinkWrap.cpp
-    Local.cpp
-    LoopPeel.cpp
-    LoopRotationUtils.cpp
-    LoopSimplify.cpp
-    LoopUnroll.cpp
-    LoopUnrollAndJam.cpp
-    LoopUnrollRuntime.cpp
-    LoopUtils.cpp
-    LoopVersioning.cpp
-    LowerInvoke.cpp
-    LowerMemIntrinsics.cpp
-    LowerSwitch.cpp
-    MatrixUtils.cpp
-    Mem2Reg.cpp
-    MetaRenamer.cpp
-    ModuleUtils.cpp
-    NameAnonGlobals.cpp
-    PredicateInfo.cpp
-    PromoteMemoryToRegister.cpp
-    SSAUpdater.cpp
-    SSAUpdaterBulk.cpp
-    SanitizerStats.cpp
-    ScalarEvolutionExpander.cpp
-    SimplifyCFG.cpp
-    SimplifyIndVar.cpp
-    SimplifyLibCalls.cpp
-    SizeOpts.cpp
-    SplitModule.cpp
-    StripGCRelocates.cpp
-    StripNonLineTableDebugInfo.cpp
-    SymbolRewriter.cpp
-    UnifyFunctionExitNodes.cpp
-    UnifyLoopExits.cpp
-    UniqueInternalLinkageNames.cpp
-    Utils.cpp
-    VNCoercion.cpp
-    ValueMapper.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/lib/Transforms/Vectorize/ya.make b/contrib/libs/llvm12/lib/Transforms/Vectorize/ya.make
deleted file mode 100644
index a68c667bde1..00000000000
--- a/contrib/libs/llvm12/lib/Transforms/Vectorize/ya.make
+++ /dev/null
@@ -1,46 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Transforms/Utils
-)
-
-ADDINCL(
-    contrib/libs/llvm12/lib/Transforms/Vectorize
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    LoadStoreVectorizer.cpp
-    LoopVectorizationLegality.cpp
-    LoopVectorize.cpp
-    SLPVectorizer.cpp
-    VPlan.cpp
-    VPlanHCFGBuilder.cpp
-    VPlanPredicator.cpp
-    VPlanSLP.cpp
-    VPlanTransforms.cpp
-    VPlanVerifier.cpp
-    VectorCombine.cpp
-    Vectorize.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/tools/dsymutil/ya.make b/contrib/libs/llvm12/tools/dsymutil/ya.make
deleted file mode 100644
index 60f8959087f..00000000000
--- a/contrib/libs/llvm12/tools/dsymutil/ya.make
+++ /dev/null
@@ -1,103 +0,0 @@
-# Generated by devtools/yamaker.
-
-PROGRAM()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Analysis
-    contrib/libs/llvm12/lib/AsmParser
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/Bitcode/Reader
-    contrib/libs/llvm12/lib/Bitcode/Writer
-    contrib/libs/llvm12/lib/Bitstream/Reader
-    contrib/libs/llvm12/lib/CodeGen
-    contrib/libs/llvm12/lib/CodeGen/AsmPrinter
-    contrib/libs/llvm12/lib/CodeGen/GlobalISel
-    contrib/libs/llvm12/lib/CodeGen/SelectionDAG
-    contrib/libs/llvm12/lib/DWARFLinker
-    contrib/libs/llvm12/lib/DebugInfo/CodeView
-    contrib/libs/llvm12/lib/DebugInfo/DWARF
-    contrib/libs/llvm12/lib/Demangle
-    contrib/libs/llvm12/lib/Frontend/OpenMP
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/IRReader
-    contrib/libs/llvm12/lib/Linker
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCDisassembler
-    contrib/libs/llvm12/lib/MC/MCParser
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Option
-    contrib/libs/llvm12/lib/ProfileData
-    contrib/libs/llvm12/lib/Remarks
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target
-    contrib/libs/llvm12/lib/Target/AArch64
-    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
-    contrib/libs/llvm12/lib/Target/AArch64/Utils
-    contrib/libs/llvm12/lib/Target/ARM
-    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
-    contrib/libs/llvm12/lib/Target/ARM/Utils
-    contrib/libs/llvm12/lib/Target/BPF
-    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
-    contrib/libs/llvm12/lib/Target/NVPTX
-    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
-    contrib/libs/llvm12/lib/Target/PowerPC
-    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
-    contrib/libs/llvm12/lib/Target/X86
-    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/X86/TargetInfo
-    contrib/libs/llvm12/lib/TextAPI/MachO
-    contrib/libs/llvm12/lib/Transforms/AggressiveInstCombine
-    contrib/libs/llvm12/lib/Transforms/CFGuard
-    contrib/libs/llvm12/lib/Transforms/IPO
-    contrib/libs/llvm12/lib/Transforms/InstCombine
-    contrib/libs/llvm12/lib/Transforms/Instrumentation
-    contrib/libs/llvm12/lib/Transforms/Scalar
-    contrib/libs/llvm12/lib/Transforms/Utils
-    contrib/libs/llvm12/lib/Transforms/Vectorize
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/dsymutil
-    contrib/libs/llvm12/tools/dsymutil
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    BinaryHolder.cpp
-    CFBundle.cpp
-    DebugMap.cpp
-    DwarfLinkerForBinary.cpp
-    MachODebugMapParser.cpp
-    MachOUtils.cpp
-    Reproducer.cpp
-    SymbolMap.cpp
-    dsymutil.cpp
-)
-
-IF (OS_DARWIN)
-    LDFLAGS(
-        -framework
-        CoreFoundation
-    )
-ENDIF()
-
-END()
diff --git a/contrib/libs/llvm12/tools/llvm-cvtres/ya.make b/contrib/libs/llvm12/tools/llvm-cvtres/ya.make
deleted file mode 100644
index fc7b01fdb7c..00000000000
--- a/contrib/libs/llvm12/tools/llvm-cvtres/ya.make
+++ /dev/null
@@ -1,44 +0,0 @@
-# Generated by devtools/yamaker.
-
-PROGRAM()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/Bitcode/Reader
-    contrib/libs/llvm12/lib/Bitstream/Reader
-    contrib/libs/llvm12/lib/Demangle
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCParser
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Option
-    contrib/libs/llvm12/lib/Remarks
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/TextAPI/MachO
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-cvtres
-    contrib/libs/llvm12/tools/llvm-cvtres
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    llvm-cvtres.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/tools/llvm-lipo/ya.make b/contrib/libs/llvm12/tools/llvm-lipo/ya.make
deleted file mode 100644
index afb28b31ce2..00000000000
--- a/contrib/libs/llvm12/tools/llvm-lipo/ya.make
+++ /dev/null
@@ -1,74 +0,0 @@
-# Generated by devtools/yamaker.
-
-PROGRAM()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/Bitcode/Reader
-    contrib/libs/llvm12/lib/Bitstream/Reader
-    contrib/libs/llvm12/lib/Demangle
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCParser
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Option
-    contrib/libs/llvm12/lib/Remarks
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/AArch64
-    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
-    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
-    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
-    contrib/libs/llvm12/lib/Target/AArch64/Utils
-    contrib/libs/llvm12/lib/Target/ARM
-    contrib/libs/llvm12/lib/Target/ARM/AsmParser
-    contrib/libs/llvm12/lib/Target/ARM/Disassembler
-    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
-    contrib/libs/llvm12/lib/Target/ARM/Utils
-    contrib/libs/llvm12/lib/Target/BPF
-    contrib/libs/llvm12/lib/Target/BPF/AsmParser
-    contrib/libs/llvm12/lib/Target/BPF/Disassembler
-    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
-    contrib/libs/llvm12/lib/Target/NVPTX
-    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
-    contrib/libs/llvm12/lib/Target/PowerPC
-    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
-    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
-    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
-    contrib/libs/llvm12/lib/Target/X86
-    contrib/libs/llvm12/lib/Target/X86/AsmParser
-    contrib/libs/llvm12/lib/Target/X86/Disassembler
-    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/X86/TargetInfo
-    contrib/libs/llvm12/lib/TextAPI/MachO
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-lipo
-    contrib/libs/llvm12/tools/llvm-lipo
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    llvm-lipo.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/tools/llvm-ml/ya.make b/contrib/libs/llvm12/tools/llvm-ml/ya.make
deleted file mode 100644
index 5371cfd8518..00000000000
--- a/contrib/libs/llvm12/tools/llvm-ml/ya.make
+++ /dev/null
@@ -1,64 +0,0 @@
-# Generated by devtools/yamaker.
-
-PROGRAM()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/Demangle
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCDisassembler
-    contrib/libs/llvm12/lib/MC/MCParser
-    contrib/libs/llvm12/lib/Option
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/Target/AArch64/AsmParser
-    contrib/libs/llvm12/lib/Target/AArch64/Disassembler
-    contrib/libs/llvm12/lib/Target/AArch64/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/AArch64/TargetInfo
-    contrib/libs/llvm12/lib/Target/AArch64/Utils
-    contrib/libs/llvm12/lib/Target/ARM/AsmParser
-    contrib/libs/llvm12/lib/Target/ARM/Disassembler
-    contrib/libs/llvm12/lib/Target/ARM/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/ARM/TargetInfo
-    contrib/libs/llvm12/lib/Target/ARM/Utils
-    contrib/libs/llvm12/lib/Target/BPF/AsmParser
-    contrib/libs/llvm12/lib/Target/BPF/Disassembler
-    contrib/libs/llvm12/lib/Target/BPF/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/BPF/TargetInfo
-    contrib/libs/llvm12/lib/Target/NVPTX/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/NVPTX/TargetInfo
-    contrib/libs/llvm12/lib/Target/PowerPC/AsmParser
-    contrib/libs/llvm12/lib/Target/PowerPC/Disassembler
-    contrib/libs/llvm12/lib/Target/PowerPC/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/PowerPC/TargetInfo
-    contrib/libs/llvm12/lib/Target/X86/AsmParser
-    contrib/libs/llvm12/lib/Target/X86/Disassembler
-    contrib/libs/llvm12/lib/Target/X86/MCTargetDesc
-    contrib/libs/llvm12/lib/Target/X86/TargetInfo
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-ml
-    contrib/libs/llvm12/tools/llvm-ml
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    Disassembler.cpp
-    llvm-ml.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/tools/llvm-mt/ya.make b/contrib/libs/llvm12/tools/llvm-mt/ya.make
deleted file mode 100644
index 83a363a067c..00000000000
--- a/contrib/libs/llvm12/tools/llvm-mt/ya.make
+++ /dev/null
@@ -1,36 +0,0 @@
-# Generated by devtools/yamaker.
-
-PROGRAM()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Demangle
-    contrib/libs/llvm12/lib/Option
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/WindowsManifest
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-mt
-    contrib/libs/llvm12/tools/llvm-mt
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    llvm-mt.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/tools/llvm-objcopy/ya.make b/contrib/libs/llvm12/tools/llvm-objcopy/ya.make
deleted file mode 100644
index 13845f4bfa1..00000000000
--- a/contrib/libs/llvm12/tools/llvm-objcopy/ya.make
+++ /dev/null
@@ -1,62 +0,0 @@
-# Generated by devtools/yamaker.
-
-PROGRAM()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/Bitcode/Reader
-    contrib/libs/llvm12/lib/Bitstream/Reader
-    contrib/libs/llvm12/lib/Demangle
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCParser
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Option
-    contrib/libs/llvm12/lib/Remarks
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/TextAPI/MachO
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-objcopy
-    contrib/libs/llvm12/tools/llvm-objcopy
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    Buffer.cpp
-    COFF/COFFObjcopy.cpp
-    COFF/Object.cpp
-    COFF/Reader.cpp
-    COFF/Writer.cpp
-    CopyConfig.cpp
-    ELF/ELFConfig.cpp
-    ELF/ELFObjcopy.cpp
-    ELF/Object.cpp
-    MachO/MachOLayoutBuilder.cpp
-    MachO/MachOObjcopy.cpp
-    MachO/MachOReader.cpp
-    MachO/MachOWriter.cpp
-    MachO/Object.cpp
-    llvm-objcopy.cpp
-    wasm/Object.cpp
-    wasm/Reader.cpp
-    wasm/WasmObjcopy.cpp
-    wasm/Writer.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/tools/llvm-rc/ya.make b/contrib/libs/llvm12/tools/llvm-rc/ya.make
deleted file mode 100644
index e69f41f5429..00000000000
--- a/contrib/libs/llvm12/tools/llvm-rc/ya.make
+++ /dev/null
@@ -1,40 +0,0 @@
-# Generated by devtools/yamaker.
-
-PROGRAM()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/Demangle
-    contrib/libs/llvm12/lib/Option
-    contrib/libs/llvm12/lib/Support
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-rc
-    contrib/libs/llvm12/tools/llvm-rc
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    ResourceFileWriter.cpp
-    ResourceScriptCppFilter.cpp
-    ResourceScriptParser.cpp
-    ResourceScriptStmt.cpp
-    ResourceScriptToken.cpp
-    llvm-rc.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/tools/llvm-symbolizer/ya.make b/contrib/libs/llvm12/tools/llvm-symbolizer/ya.make
deleted file mode 100644
index 1f13f78269f..00000000000
--- a/contrib/libs/llvm12/tools/llvm-symbolizer/ya.make
+++ /dev/null
@@ -1,49 +0,0 @@
-# Generated by devtools/yamaker.
-
-PROGRAM()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/include
-    contrib/libs/llvm12/lib/BinaryFormat
-    contrib/libs/llvm12/lib/Bitcode/Reader
-    contrib/libs/llvm12/lib/Bitstream/Reader
-    contrib/libs/llvm12/lib/DebugInfo/CodeView
-    contrib/libs/llvm12/lib/DebugInfo/DWARF
-    contrib/libs/llvm12/lib/DebugInfo/MSF
-    contrib/libs/llvm12/lib/DebugInfo/PDB
-    contrib/libs/llvm12/lib/DebugInfo/Symbolize
-    contrib/libs/llvm12/lib/Demangle
-    contrib/libs/llvm12/lib/IR
-    contrib/libs/llvm12/lib/MC
-    contrib/libs/llvm12/lib/MC/MCParser
-    contrib/libs/llvm12/lib/Object
-    contrib/libs/llvm12/lib/Option
-    contrib/libs/llvm12/lib/Remarks
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/TextAPI/MachO
-)
-
-ADDINCL(
-    ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/tools/llvm-symbolizer
-    contrib/libs/llvm12/tools/llvm-symbolizer
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    llvm-symbolizer.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/utils/TableGen/GlobalISel/ya.make b/contrib/libs/llvm12/utils/TableGen/GlobalISel/ya.make
deleted file mode 100644
index 4a072b7300d..00000000000
--- a/contrib/libs/llvm12/utils/TableGen/GlobalISel/ya.make
+++ /dev/null
@@ -1,37 +0,0 @@
-# Generated by devtools/yamaker.
-
-LIBRARY()
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-)
-
-ADDINCL(
-    contrib/libs/llvm12/utils/TableGen/GlobalISel
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    CodeExpander.cpp
-    GIMatchDag.cpp
-    GIMatchDagEdge.cpp
-    GIMatchDagInstr.cpp
-    GIMatchDagOperands.cpp
-    GIMatchDagPredicate.cpp
-    GIMatchDagPredicateDependencyEdge.cpp
-    GIMatchTree.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/utils/TableGen/ya.make b/contrib/libs/llvm12/utils/TableGen/ya.make
deleted file mode 100644
index 69c2241a4d1..00000000000
--- a/contrib/libs/llvm12/utils/TableGen/ya.make
+++ /dev/null
@@ -1,85 +0,0 @@
-# Generated by devtools/yamaker.
-
-PROGRAM(llvm-tblgen)
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-LICENSE(Apache-2.0 WITH LLVM-exception)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-PEERDIR(
-    contrib/libs/llvm12
-    contrib/libs/llvm12/lib/Demangle
-    contrib/libs/llvm12/lib/Support
-    contrib/libs/llvm12/lib/TableGen
-    contrib/libs/llvm12/utils/TableGen/GlobalISel
-)
-
-ADDINCL(
-    contrib/libs/llvm12/utils/TableGen
-)
-
-NO_COMPILER_WARNINGS()
-
-NO_UTIL()
-
-SRCS(
-    AsmMatcherEmitter.cpp
-    AsmWriterEmitter.cpp
-    AsmWriterInst.cpp
-    Attributes.cpp
-    CTagsEmitter.cpp
-    CallingConvEmitter.cpp
-    CodeEmitterGen.cpp
-    CodeGenDAGPatterns.cpp
-    CodeGenHwModes.cpp
-    CodeGenInstruction.cpp
-    CodeGenMapTable.cpp
-    CodeGenRegisters.cpp
-    CodeGenSchedule.cpp
-    CodeGenTarget.cpp
-    DAGISelEmitter.cpp
-    DAGISelMatcher.cpp
-    DAGISelMatcherEmitter.cpp
-    DAGISelMatcherGen.cpp
-    DAGISelMatcherOpt.cpp
-    DFAEmitter.cpp
-    DFAPacketizerEmitter.cpp
-    DirectiveEmitter.cpp
-    DisassemblerEmitter.cpp
-    ExegesisEmitter.cpp
-    FastISelEmitter.cpp
-    FixedLenDecoderEmitter.cpp
-    GICombinerEmitter.cpp
-    GlobalISelEmitter.cpp
-    InfoByHwMode.cpp
-    InstrDocsEmitter.cpp
-    InstrInfoEmitter.cpp
-    IntrinsicEmitter.cpp
-    OptEmitter.cpp
-    OptParserEmitter.cpp
-    OptRSTEmitter.cpp
-    PredicateExpander.cpp
-    PseudoLoweringEmitter.cpp
-    RISCVCompressInstEmitter.cpp
-    RegisterBankEmitter.cpp
-    RegisterInfoEmitter.cpp
-    SDNodeProperties.cpp
-    SearchableTableEmitter.cpp
-    SubtargetEmitter.cpp
-    SubtargetFeatureInfo.cpp
-    TableGen.cpp
-    Types.cpp
-    WebAssemblyDisassemblerEmitter.cpp
-    X86DisassemblerTables.cpp
-    X86EVEX2VEXTablesEmitter.cpp
-    X86FoldTablesEmitter.cpp
-    X86ModRMFilters.cpp
-    X86RecognizableInstr.cpp
-)
-
-END()
diff --git a/contrib/libs/llvm12/ya.make b/contrib/libs/llvm12/ya.make
deleted file mode 100644
index d193c043a4e..00000000000
--- a/contrib/libs/llvm12/ya.make
+++ /dev/null
@@ -1,209 +0,0 @@
-# Generated by devtools/yamaker from nixpkgs 21.11.
-
-LIBRARY()
-
-LICENSE(
-    Apache-2.0 WITH LLVM-exception AND
-    NCSA
-)
-
-LICENSE_TEXTS(.yandex_meta/licenses.list.txt)
-
-OWNER(
-    orivej
-    g:cpp-contrib
-)
-
-VERSION(12.0.1)
-
-ORIGINAL_SOURCE(https://github.com/llvm/llvm-project/releases/download/llvmorg-12.0.1/llvm-12.0.1.src.tar.xz)
-
-ADDINCL(
-    GLOBAL ${ARCADIA_BUILD_ROOT}/contrib/libs/llvm12/include
-    GLOBAL contrib/libs/llvm12/include
-)
-
-END()
-
-RECURSE(
-    include
-    lib/Analysis
-    lib/AsmParser
-    lib/BinaryFormat
-    lib/Bitcode/Reader
-    lib/Bitcode/Writer
-    lib/Bitstream/Reader
-    lib/CodeGen
-    lib/CodeGen/AsmPrinter
-    lib/CodeGen/GlobalISel
-    lib/CodeGen/MIRParser
-    lib/CodeGen/SelectionDAG
-    lib/DWARFLinker
-    lib/DebugInfo/CodeView
-    lib/DebugInfo/DWARF
-    lib/DebugInfo/GSYM
-    lib/DebugInfo/MSF
-    lib/DebugInfo/PDB
-    lib/DebugInfo/Symbolize
-    lib/Demangle
-    lib/ExecutionEngine
-    lib/ExecutionEngine/Interpreter
-    lib/ExecutionEngine/JITLink
-    lib/ExecutionEngine/MCJIT
-    lib/ExecutionEngine/Orc
-    lib/ExecutionEngine/Orc/Shared
-    lib/ExecutionEngine/Orc/TargetProcess
-    lib/ExecutionEngine/RuntimeDyld
-    lib/Extensions
-    lib/FileCheck
-    lib/Frontend/OpenACC
-    lib/Frontend/OpenMP
-    lib/FuzzMutate
-    lib/IR
-    lib/IRReader
-    lib/InterfaceStub
-    lib/LTO
-    lib/LineEditor
-    lib/Linker
-    lib/MC
-    lib/MC/MCDisassembler
-    lib/MC/MCParser
-    lib/MCA
-    lib/Object
-    lib/ObjectYAML
-    lib/Option
-    lib/Passes
-    lib/ProfileData
-    lib/ProfileData/Coverage
-    lib/Remarks
-    lib/Support
-    lib/TableGen
-    lib/Target
-    lib/Target/AArch64
-    lib/Target/AArch64/AsmParser
-    lib/Target/AArch64/Disassembler
-    lib/Target/AArch64/MCTargetDesc
-    lib/Target/AArch64/TargetInfo
-    lib/Target/AArch64/Utils
-    lib/Target/ARM
-    lib/Target/ARM/AsmParser
-    lib/Target/ARM/Disassembler
-    lib/Target/ARM/MCTargetDesc
-    lib/Target/ARM/TargetInfo
-    lib/Target/ARM/Utils
-    lib/Target/BPF
-    lib/Target/BPF/AsmParser
-    lib/Target/BPF/Disassembler
-    lib/Target/BPF/MCTargetDesc
-    lib/Target/BPF/TargetInfo
-    lib/Target/NVPTX
-    lib/Target/NVPTX/MCTargetDesc
-    lib/Target/NVPTX/TargetInfo
-    lib/Target/PowerPC
-    lib/Target/PowerPC/AsmParser
-    lib/Target/PowerPC/Disassembler
-    lib/Target/PowerPC/MCTargetDesc
-    lib/Target/PowerPC/TargetInfo
-    lib/Target/X86
-    lib/Target/X86/AsmParser
-    lib/Target/X86/Disassembler
-    lib/Target/X86/MCTargetDesc
-    lib/Target/X86/TargetInfo
-    lib/TextAPI/MachO
-    lib/ToolDrivers/llvm-dlltool
-    lib/ToolDrivers/llvm-lib
-    lib/Transforms/AggressiveInstCombine
-    lib/Transforms/CFGuard
-    lib/Transforms/Coroutines
-    lib/Transforms/HelloNew
-    lib/Transforms/IPO
-    lib/Transforms/InstCombine
-    lib/Transforms/Instrumentation
-    lib/Transforms/ObjCARC
-    lib/Transforms/Scalar
-    lib/Transforms/Utils
-    lib/Transforms/Vectorize
-    lib/WindowsManifest
-    lib/XRay
-    tools/bugpoint
-    tools/dsymutil
-    tools/llc
-    tools/lli
-    tools/lli/ChildTarget
-    tools/llvm-ar
-    tools/llvm-as
-    tools/llvm-bcanalyzer
-    tools/llvm-cat
-    tools/llvm-cfi-verify
-    tools/llvm-cfi-verify/lib
-    tools/llvm-config
-    tools/llvm-cov
-    tools/llvm-cvtres
-    tools/llvm-cxxdump
-    tools/llvm-cxxfilt
-    tools/llvm-cxxmap
-    tools/llvm-diff
-    tools/llvm-dis
-    tools/llvm-dwarfdump
-    tools/llvm-dwp
-    tools/llvm-elfabi
-    tools/llvm-exegesis
-    tools/llvm-exegesis/lib
-    tools/llvm-exegesis/lib/AArch64
-    tools/llvm-exegesis/lib/PowerPC
-    tools/llvm-exegesis/lib/X86
-    tools/llvm-extract
-    tools/llvm-gsymutil
-    tools/llvm-ifs
-    tools/llvm-jitlink
-    tools/llvm-jitlink/llvm-jitlink-executor
-    tools/llvm-libtool-darwin
-    tools/llvm-link
-    tools/llvm-lipo
-    tools/llvm-lto
-    tools/llvm-lto2
-    tools/llvm-mc
-    tools/llvm-mca
-    tools/llvm-ml
-    tools/llvm-modextract
-    tools/llvm-mt
-    tools/llvm-nm
-    tools/llvm-objcopy
-    tools/llvm-objdump
-    tools/llvm-opt-report
-    tools/llvm-pdbutil
-    tools/llvm-profdata
-    tools/llvm-profgen
-    tools/llvm-rc
-    tools/llvm-readobj
-    tools/llvm-reduce
-    tools/llvm-rtdyld
-    tools/llvm-size
-    tools/llvm-split
-    tools/llvm-stress
-    tools/llvm-strings
-    tools/llvm-symbolizer
-    tools/llvm-undname
-    tools/llvm-xray
-    tools/lto
-    tools/obj2yaml
-    tools/opt
-    tools/polly/lib
-    tools/polly/lib/External/isl
-    tools/polly/lib/External/ppcg
-    tools/remarks-shlib
-    tools/sancov
-    tools/sanstats
-    tools/split-file
-    tools/verify-uselistorder
-    tools/yaml2obj
-    utils/TableGen
-    utils/TableGen/GlobalISel
-)
-
-IF (OS_LINUX)
-    RECURSE(
-        lib/ExecutionEngine/PerfJITEvents
-        tools/gold
-    )
-ENDIF()