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author | shadchin <shadchin@yandex-team.ru> | 2022-02-10 16:44:30 +0300 |
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committer | Daniil Cherednik <dcherednik@yandex-team.ru> | 2022-02-10 16:44:30 +0300 |
commit | 2598ef1d0aee359b4b6d5fdd1758916d5907d04f (patch) | |
tree | 012bb94d777798f1f56ac1cec429509766d05181 /contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td | |
parent | 6751af0b0c1b952fede40b19b71da8025b5d8bcf (diff) | |
download | ydb-2598ef1d0aee359b4b6d5fdd1758916d5907d04f.tar.gz |
Restoring authorship annotation for <shadchin@yandex-team.ru>. Commit 1 of 2.
Diffstat (limited to 'contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td')
-rw-r--r-- | contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td | 44 |
1 files changed, 22 insertions, 22 deletions
diff --git a/contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td b/contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td index 777c5a158b..0d9595128f 100644 --- a/contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td +++ b/contrib/libs/llvm12/lib/Target/X86/X86InstrFragmentsSIMD.td @@ -87,16 +87,16 @@ def X86multishift : SDNode<"X86ISD::MULTISHIFT", SDTCisSameAs<1,2>]>>; def X86pextrb : SDNode<"X86ISD::PEXTRB", SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v16i8>, - SDTCisVT<2, i8>]>>; + SDTCisVT<2, i8>]>>; def X86pextrw : SDNode<"X86ISD::PEXTRW", SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v8i16>, - SDTCisVT<2, i8>]>>; + SDTCisVT<2, i8>]>>; def X86pinsrb : SDNode<"X86ISD::PINSRB", SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>, - SDTCisVT<2, i32>, SDTCisVT<3, i8>]>>; + SDTCisVT<2, i32>, SDTCisVT<3, i8>]>>; def X86pinsrw : SDNode<"X86ISD::PINSRW", SDTypeProfile<1, 3, [SDTCisVT<0, v8i16>, SDTCisSameAs<0,1>, - SDTCisVT<2, i32>, SDTCisVT<3, i8>]>>; + SDTCisVT<2, i32>, SDTCisVT<3, i8>]>>; def X86insertps : SDNode<"X86ISD::INSERTPS", SDTypeProfile<1, 3, [SDTCisVT<0, v4f32>, SDTCisSameAs<0,1>, SDTCisVT<2, v4f32>, SDTCisVT<3, i8>]>>; @@ -109,8 +109,8 @@ def X86vextractst : SDNode<"X86ISD::VEXTRACT_STORE", SDTStore, [SDNPHasChain, SDNPMayStore, SDNPMemOperand]>; def X86VBroadcastld : SDNode<"X86ISD::VBROADCAST_LOAD", SDTLoad, [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; -def X86SubVBroadcastld : SDNode<"X86ISD::SUBV_BROADCAST_LOAD", SDTLoad, - [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; +def X86SubVBroadcastld : SDNode<"X86ISD::SUBV_BROADCAST_LOAD", SDTLoad, + [SDNPHasChain, SDNPMayLoad, SDNPMemOperand]>; def SDTVtrunc : SDTypeProfile<1, 1, [SDTCisVec<0>, SDTCisVec<1>, SDTCisInt<0>, SDTCisInt<1>, @@ -209,21 +209,21 @@ def X86CmpMaskCC : SDTypeProfile<1, 3, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>, SDTCisVec<1>, SDTCisSameAs<2, 1>, SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>]>; -def X86MaskCmpMaskCC : - SDTypeProfile<1, 4, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>, - SDTCisVec<1>, SDTCisSameAs<2, 1>, - SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>, SDTCisSameAs<4, 0>]>; +def X86MaskCmpMaskCC : + SDTypeProfile<1, 4, [SDTCisVec<0>, SDTCVecEltisVT<0, i1>, + SDTCisVec<1>, SDTCisSameAs<2, 1>, + SDTCisSameNumEltsAs<0, 1>, SDTCisVT<3, i8>, SDTCisSameAs<4, 0>]>; def X86CmpMaskCCScalar : SDTypeProfile<1, 3, [SDTCisInt<0>, SDTCisFP<1>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>; def X86cmpm : SDNode<"X86ISD::CMPM", X86CmpMaskCC>; -def X86cmpmm : SDNode<"X86ISD::CMPMM", X86MaskCmpMaskCC>; +def X86cmpmm : SDNode<"X86ISD::CMPMM", X86MaskCmpMaskCC>; def X86strict_cmpm : SDNode<"X86ISD::STRICT_CMPM", X86CmpMaskCC, [SDNPHasChain]>; def X86any_cmpm : PatFrags<(ops node:$src1, node:$src2, node:$src3), [(X86strict_cmpm node:$src1, node:$src2, node:$src3), (X86cmpm node:$src1, node:$src2, node:$src3)]>; -def X86cmpmmSAE : SDNode<"X86ISD::CMPMM_SAE", X86MaskCmpMaskCC>; +def X86cmpmmSAE : SDNode<"X86ISD::CMPMM_SAE", X86MaskCmpMaskCC>; def X86cmpms : SDNode<"X86ISD::FSETCCM", X86CmpMaskCCScalar>; def X86cmpmsSAE : SDNode<"X86ISD::FSETCCM_SAE", X86CmpMaskCCScalar>; @@ -961,16 +961,16 @@ def X86VBroadcastld64 : PatFrag<(ops node:$src), return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 8; }]>; -def X86SubVBroadcastld128 : PatFrag<(ops node:$src), - (X86SubVBroadcastld node:$src), [{ - return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 16; -}]>; - -def X86SubVBroadcastld256 : PatFrag<(ops node:$src), - (X86SubVBroadcastld node:$src), [{ - return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 32; -}]>; - +def X86SubVBroadcastld128 : PatFrag<(ops node:$src), + (X86SubVBroadcastld node:$src), [{ + return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 16; +}]>; + +def X86SubVBroadcastld256 : PatFrag<(ops node:$src), + (X86SubVBroadcastld node:$src), [{ + return cast<MemIntrinsicSDNode>(N)->getMemoryVT().getStoreSize() == 32; +}]>; + // Scalar SSE intrinsic fragments to match several different types of loads. // Used by scalar SSE intrinsic instructions which have 128 bit types, but // only load a single element. |