Restoring authorship annotation for <shadchin@yandex-team.ru>. Commit 1 of 2.

1 files changed, 34 insertions, 34 deletions

diff --git a/contrib/libs/llvm12/lib/Target/ARM/ARMHazardRecognizer.h b/contrib/libs/llvm12/lib/Target/ARM/ARMHazardRecognizer.h
index c1f1bcd0a6..e6b5304488 100644
--- a/contrib/libs/llvm12/lib/Target/ARM/ARMHazardRecognizer.h
+++ b/contrib/libs/llvm12/lib/Target/ARM/ARMHazardRecognizer.h
@@ -13,28 +13,28 @@
 #ifndef LLVM_LIB_TARGET_ARM_ARMHAZARDRECOGNIZER_H
 #define LLVM_LIB_TARGET_ARM_ARMHAZARDRECOGNIZER_H
 
-#include "ARMBaseInstrInfo.h"
-#include "llvm/ADT/BitmaskEnum.h"
-#include "llvm/ADT/SmallVector.h"
-#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
-#include "llvm/Support/DataTypes.h"
-#include <array>
-#include <initializer_list>
+#include "ARMBaseInstrInfo.h" 
+#include "llvm/ADT/BitmaskEnum.h" 
+#include "llvm/ADT/SmallVector.h" 
+#include "llvm/CodeGen/ScheduleHazardRecognizer.h" 
+#include "llvm/Support/DataTypes.h" 
+#include <array> 
+#include <initializer_list> 
 
 namespace llvm {
 
-class DataLayout;
-class MachineFunction;
+class DataLayout; 
+class MachineFunction; 
 class MachineInstr;
-class ScheduleDAG;
+class ScheduleDAG; 
 
-// Hazards related to FP MLx instructions
-class ARMHazardRecognizerFPMLx : public ScheduleHazardRecognizer {
+// Hazards related to FP MLx instructions 
+class ARMHazardRecognizerFPMLx : public ScheduleHazardRecognizer { 
   MachineInstr *LastMI = nullptr;
   unsigned FpMLxStalls = 0;
 
 public:
-  ARMHazardRecognizerFPMLx() : ScheduleHazardRecognizer() { MaxLookAhead = 1; }
+  ARMHazardRecognizerFPMLx() : ScheduleHazardRecognizer() { MaxLookAhead = 1; } 
 
   HazardType getHazardType(SUnit *SU, int Stalls) override;
   void Reset() override;
@@ -43,27 +43,27 @@ public:
   void RecedeCycle() override;
 };
 
-// Hazards related to bank conflicts
-class ARMBankConflictHazardRecognizer : public ScheduleHazardRecognizer {
-  SmallVector<MachineInstr *, 8> Accesses;
-  const MachineFunction &MF;
-  const DataLayout &DL;
-  int64_t DataMask;
-  bool AssumeITCMBankConflict;
-
-public:
-  ARMBankConflictHazardRecognizer(const ScheduleDAG *DAG, int64_t DDM,
-                                  bool ABC);
-  HazardType getHazardType(SUnit *SU, int Stalls) override;
-  void Reset() override;
-  void EmitInstruction(SUnit *SU) override;
-  void AdvanceCycle() override;
-  void RecedeCycle() override;
-
-private:
-  inline HazardType CheckOffsets(unsigned O0, unsigned O1);
-};
-
+// Hazards related to bank conflicts 
+class ARMBankConflictHazardRecognizer : public ScheduleHazardRecognizer { 
+  SmallVector<MachineInstr *, 8> Accesses; 
+  const MachineFunction &MF; 
+  const DataLayout &DL; 
+  int64_t DataMask; 
+  bool AssumeITCMBankConflict; 
+ 
+public: 
+  ARMBankConflictHazardRecognizer(const ScheduleDAG *DAG, int64_t DDM, 
+                                  bool ABC); 
+  HazardType getHazardType(SUnit *SU, int Stalls) override; 
+  void Reset() override; 
+  void EmitInstruction(SUnit *SU) override; 
+  void AdvanceCycle() override; 
+  void RecedeCycle() override; 
+ 
+private: 
+  inline HazardType CheckOffsets(unsigned O0, unsigned O1); 
+}; 
+ 
 } // end namespace llvm
 
 #endif