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author | shadchin <shadchin@yandex-team.ru> | 2022-02-10 16:44:39 +0300 |
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committer | Daniil Cherednik <dcherednik@yandex-team.ru> | 2022-02-10 16:44:39 +0300 |
commit | e9656aae26e0358d5378e5b63dcac5c8dbe0e4d0 (patch) | |
tree | 64175d5cadab313b3e7039ebaa06c5bc3295e274 /contrib/libs/llvm12/lib/CodeGen/PHIElimination.cpp | |
parent | 2598ef1d0aee359b4b6d5fdd1758916d5907d04f (diff) | |
download | ydb-e9656aae26e0358d5378e5b63dcac5c8dbe0e4d0.tar.gz |
Restoring authorship annotation for <shadchin@yandex-team.ru>. Commit 2 of 2.
Diffstat (limited to 'contrib/libs/llvm12/lib/CodeGen/PHIElimination.cpp')
-rw-r--r-- | contrib/libs/llvm12/lib/CodeGen/PHIElimination.cpp | 110 |
1 files changed, 55 insertions, 55 deletions
diff --git a/contrib/libs/llvm12/lib/CodeGen/PHIElimination.cpp b/contrib/libs/llvm12/lib/CodeGen/PHIElimination.cpp index 72c2eb06dc..8148b64d84 100644 --- a/contrib/libs/llvm12/lib/CodeGen/PHIElimination.cpp +++ b/contrib/libs/llvm12/lib/CodeGen/PHIElimination.cpp @@ -101,10 +101,10 @@ namespace { // These functions are temporary abstractions around LiveVariables and // LiveIntervals, so they can go away when LiveVariables does. - bool isLiveIn(Register Reg, const MachineBasicBlock *MBB); - bool isLiveOutPastPHIs(Register Reg, const MachineBasicBlock *MBB); + bool isLiveIn(Register Reg, const MachineBasicBlock *MBB); + bool isLiveOutPastPHIs(Register Reg, const MachineBasicBlock *MBB); - using BBVRegPair = std::pair<unsigned, Register>; + using BBVRegPair = std::pair<unsigned, Register>; using VRegPHIUse = DenseMap<BBVRegPair, unsigned>; VRegPHIUse VRegPHIUseCount; @@ -324,43 +324,43 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB, // Increment use count of the newly created virtual register. LV->setPHIJoin(IncomingReg); - MachineInstr *OldKill = nullptr; - bool IsPHICopyAfterOldKill = false; - - if (reusedIncoming && (OldKill = VI.findKill(&MBB))) { - // Calculate whether the PHICopy is after the OldKill. - // In general, the PHICopy is inserted as the first non-phi instruction - // by default, so it's before the OldKill. But some Target hooks for - // createPHIDestinationCopy() may modify the default insert position of - // PHICopy. - for (auto I = MBB.SkipPHIsAndLabels(MBB.begin()), E = MBB.end(); - I != E; ++I) { - if (I == PHICopy) - break; - - if (I == OldKill) { - IsPHICopyAfterOldKill = true; - break; - } + MachineInstr *OldKill = nullptr; + bool IsPHICopyAfterOldKill = false; + + if (reusedIncoming && (OldKill = VI.findKill(&MBB))) { + // Calculate whether the PHICopy is after the OldKill. + // In general, the PHICopy is inserted as the first non-phi instruction + // by default, so it's before the OldKill. But some Target hooks for + // createPHIDestinationCopy() may modify the default insert position of + // PHICopy. + for (auto I = MBB.SkipPHIsAndLabels(MBB.begin()), E = MBB.end(); + I != E; ++I) { + if (I == PHICopy) + break; + + if (I == OldKill) { + IsPHICopyAfterOldKill = true; + break; + } } - } - - // When we are reusing the incoming register and it has been marked killed - // by OldKill, if the PHICopy is after the OldKill, we should remove the - // killed flag from OldKill. - if (IsPHICopyAfterOldKill) { - LLVM_DEBUG(dbgs() << "Remove old kill from " << *OldKill); - LV->removeVirtualRegisterKilled(IncomingReg, *OldKill); - LLVM_DEBUG(MBB.dump()); - } - - // Add information to LiveVariables to know that the first used incoming - // value or the resued incoming value whose PHICopy is after the OldKIll - // is killed. Note that because the value is defined in several places - // (once each for each incoming block), the "def" block and instruction - // fields for the VarInfo is not filled in. - if (!OldKill || IsPHICopyAfterOldKill) - LV->addVirtualRegisterKilled(IncomingReg, *PHICopy); + } + + // When we are reusing the incoming register and it has been marked killed + // by OldKill, if the PHICopy is after the OldKill, we should remove the + // killed flag from OldKill. + if (IsPHICopyAfterOldKill) { + LLVM_DEBUG(dbgs() << "Remove old kill from " << *OldKill); + LV->removeVirtualRegisterKilled(IncomingReg, *OldKill); + LLVM_DEBUG(MBB.dump()); + } + + // Add information to LiveVariables to know that the first used incoming + // value or the resued incoming value whose PHICopy is after the OldKIll + // is killed. Note that because the value is defined in several places + // (once each for each incoming block), the "def" block and instruction + // fields for the VarInfo is not filled in. + if (!OldKill || IsPHICopyAfterOldKill) + LV->addVirtualRegisterKilled(IncomingReg, *PHICopy); } // Since we are going to be deleting the PHI node, if it is the last use of @@ -394,7 +394,7 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB, } LiveInterval &DestLI = LIS->getInterval(DestReg); - assert(!DestLI.empty() && "PHIs should have nonempty LiveIntervals."); + assert(!DestLI.empty() && "PHIs should have nonempty LiveIntervals."); if (DestLI.endIndex().isDead()) { // A dead PHI's live range begins and ends at the start of the MBB, but // the lowered copy, which will still be dead, needs to begin and end at @@ -441,19 +441,19 @@ void PHIElimination::LowerPHINode(MachineBasicBlock &MBB, if (!MBBsInsertedInto.insert(&opBlock).second) continue; // If the copy has already been emitted, we're done. - MachineInstr *SrcRegDef = MRI->getVRegDef(SrcReg); - if (SrcRegDef && TII->isUnspillableTerminator(SrcRegDef)) { - assert(SrcRegDef->getOperand(0).isReg() && - SrcRegDef->getOperand(0).isDef() && - "Expected operand 0 to be a reg def!"); - // Now that the PHI's use has been removed (as the instruction was - // removed) there should be no other uses of the SrcReg. - assert(MRI->use_empty(SrcReg) && - "Expected a single use from UnspillableTerminator"); - SrcRegDef->getOperand(0).setReg(IncomingReg); - continue; - } - + MachineInstr *SrcRegDef = MRI->getVRegDef(SrcReg); + if (SrcRegDef && TII->isUnspillableTerminator(SrcRegDef)) { + assert(SrcRegDef->getOperand(0).isReg() && + SrcRegDef->getOperand(0).isDef() && + "Expected operand 0 to be a reg def!"); + // Now that the PHI's use has been removed (as the instruction was + // removed) there should be no other uses of the SrcReg. + assert(MRI->use_empty(SrcReg) && + "Expected a single use from UnspillableTerminator"); + SrcRegDef->getOperand(0).setReg(IncomingReg); + continue; + } + // Find a safe location to insert the copy, this may be the first terminator // in the block (or end()). MachineBasicBlock::iterator InsertPos = @@ -704,7 +704,7 @@ bool PHIElimination::SplitPHIEdges(MachineFunction &MF, return Changed; } -bool PHIElimination::isLiveIn(Register Reg, const MachineBasicBlock *MBB) { +bool PHIElimination::isLiveIn(Register Reg, const MachineBasicBlock *MBB) { assert((LV || LIS) && "isLiveIn() requires either LiveVariables or LiveIntervals"); if (LIS) @@ -713,7 +713,7 @@ bool PHIElimination::isLiveIn(Register Reg, const MachineBasicBlock *MBB) { return LV->isLiveIn(Reg, *MBB); } -bool PHIElimination::isLiveOutPastPHIs(Register Reg, +bool PHIElimination::isLiveOutPastPHIs(Register Reg, const MachineBasicBlock *MBB) { assert((LV || LIS) && "isLiveOutPastPHIs() requires either LiveVariables or LiveIntervals"); |