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author | shadchin <shadchin@yandex-team.ru> | 2022-02-10 16:44:39 +0300 |
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committer | Daniil Cherednik <dcherednik@yandex-team.ru> | 2022-02-10 16:44:39 +0300 |
commit | e9656aae26e0358d5378e5b63dcac5c8dbe0e4d0 (patch) | |
tree | 64175d5cadab313b3e7039ebaa06c5bc3295e274 /contrib/libs/llvm12/lib/CodeGen/DeadMachineInstructionElim.cpp | |
parent | 2598ef1d0aee359b4b6d5fdd1758916d5907d04f (diff) | |
download | ydb-e9656aae26e0358d5378e5b63dcac5c8dbe0e4d0.tar.gz |
Restoring authorship annotation for <shadchin@yandex-team.ru>. Commit 2 of 2.
Diffstat (limited to 'contrib/libs/llvm12/lib/CodeGen/DeadMachineInstructionElim.cpp')
-rw-r--r-- | contrib/libs/llvm12/lib/CodeGen/DeadMachineInstructionElim.cpp | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/contrib/libs/llvm12/lib/CodeGen/DeadMachineInstructionElim.cpp b/contrib/libs/llvm12/lib/CodeGen/DeadMachineInstructionElim.cpp index 95df2a1c66..93467e9d09 100644 --- a/contrib/libs/llvm12/lib/CodeGen/DeadMachineInstructionElim.cpp +++ b/contrib/libs/llvm12/lib/CodeGen/DeadMachineInstructionElim.cpp @@ -10,7 +10,7 @@ // //===----------------------------------------------------------------------===// -#include "llvm/ADT/PostOrderIterator.h" +#include "llvm/ADT/PostOrderIterator.h" #include "llvm/ADT/Statistic.h" #include "llvm/CodeGen/MachineFunctionPass.h" #include "llvm/CodeGen/MachineRegisterInfo.h" @@ -49,8 +49,8 @@ namespace { private: bool isDead(const MachineInstr *MI) const; - - bool eliminateDeadMI(MachineFunction &MF); + + bool eliminateDeadMI(MachineFunction &MF); }; } char DeadMachineInstructionElim::ID = 0; @@ -110,13 +110,13 @@ bool DeadMachineInstructionElim::isDead(const MachineInstr *MI) const { bool DeadMachineInstructionElim::runOnMachineFunction(MachineFunction &MF) { if (skipFunction(MF.getFunction())) return false; - bool AnyChanges = eliminateDeadMI(MF); - while (AnyChanges && eliminateDeadMI(MF)) - ; - return AnyChanges; -} + bool AnyChanges = eliminateDeadMI(MF); + while (AnyChanges && eliminateDeadMI(MF)) + ; + return AnyChanges; +} -bool DeadMachineInstructionElim::eliminateDeadMI(MachineFunction &MF) { +bool DeadMachineInstructionElim::eliminateDeadMI(MachineFunction &MF) { bool AnyChanges = false; MRI = &MF.getRegInfo(); TRI = MF.getSubtarget().getRegisterInfo(); @@ -125,24 +125,24 @@ bool DeadMachineInstructionElim::eliminateDeadMI(MachineFunction &MF) { // Loop over all instructions in all blocks, from bottom to top, so that it's // more likely that chains of dependent but ultimately dead instructions will // be cleaned up. - for (MachineBasicBlock *MBB : post_order(&MF)) { + for (MachineBasicBlock *MBB : post_order(&MF)) { // Start out assuming that reserved registers are live out of this block. LivePhysRegs = MRI->getReservedRegs(); // Add live-ins from successors to LivePhysRegs. Normally, physregs are not // live across blocks, but some targets (x86) can have flags live out of a // block. - for (MachineBasicBlock::succ_iterator S = MBB->succ_begin(), - E = MBB->succ_end(); - S != E; S++) + for (MachineBasicBlock::succ_iterator S = MBB->succ_begin(), + E = MBB->succ_end(); + S != E; S++) for (const auto &LI : (*S)->liveins()) LivePhysRegs.set(LI.PhysReg); // Now scan the instructions and delete dead ones, tracking physreg // liveness as we go. - for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(), - MIE = MBB->rend(); - MII != MIE;) { + for (MachineBasicBlock::reverse_iterator MII = MBB->rbegin(), + MIE = MBB->rend(); + MII != MIE;) { MachineInstr *MI = &*MII++; // If the instruction is dead, delete it! |