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author | Devtools Arcadia <arcadia-devtools@yandex-team.ru> | 2022-02-07 18:08:42 +0300 |
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committer | Devtools Arcadia <arcadia-devtools@mous.vla.yp-c.yandex.net> | 2022-02-07 18:08:42 +0300 |
commit | 1110808a9d39d4b808aef724c861a2e1a38d2a69 (patch) | |
tree | e26c9fed0de5d9873cce7e00bc214573dc2195b7 /contrib/libs/llvm12/include/llvm/Support/X86TargetParser.def | |
download | ydb-1110808a9d39d4b808aef724c861a2e1a38d2a69.tar.gz |
intermediate changes
ref:cde9a383711a11544ce7e107a78147fb96cc4029
Diffstat (limited to 'contrib/libs/llvm12/include/llvm/Support/X86TargetParser.def')
-rw-r--r-- | contrib/libs/llvm12/include/llvm/Support/X86TargetParser.def | 203 |
1 files changed, 203 insertions, 0 deletions
diff --git a/contrib/libs/llvm12/include/llvm/Support/X86TargetParser.def b/contrib/libs/llvm12/include/llvm/Support/X86TargetParser.def new file mode 100644 index 0000000000..ec19ce4e7c --- /dev/null +++ b/contrib/libs/llvm12/include/llvm/Support/X86TargetParser.def @@ -0,0 +1,203 @@ +//===- X86TargetParser.def - X86 target parsing defines ---------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file provides defines to build up the X86 target parser's logic. +// +//===----------------------------------------------------------------------===// + +// NOTE: NO INCLUDE GUARD DESIRED! + +#ifndef X86_VENDOR +#define X86_VENDOR(ENUM, STR) +#endif +X86_VENDOR(VENDOR_INTEL, "intel") +X86_VENDOR(VENDOR_AMD, "amd") +#undef X86_VENDOR + +// This macro is used for cpu types present in compiler-rt/libgcc. +#ifndef X86_CPU_TYPE +#define X86_CPU_TYPE(ENUM, STR) +#endif + +#ifndef X86_CPU_TYPE_ALIAS +#define X86_CPU_TYPE_ALIAS(ENUM, STR) +#endif + +// This list must match what is implemented in libgcc and compilert-rt. Clang +// uses this to know how to implement __builtin_cpu_is. +X86_CPU_TYPE(INTEL_BONNELL, "bonnell") +X86_CPU_TYPE(INTEL_CORE2, "core2") +X86_CPU_TYPE(INTEL_COREI7, "corei7") +X86_CPU_TYPE(AMDFAM10H, "amdfam10h") +X86_CPU_TYPE(AMDFAM15H, "amdfam15h") +X86_CPU_TYPE(INTEL_SILVERMONT, "silvermont") +X86_CPU_TYPE(INTEL_KNL, "knl") +X86_CPU_TYPE(AMD_BTVER1, "btver1") +X86_CPU_TYPE(AMD_BTVER2, "btver2") +X86_CPU_TYPE(AMDFAM17H, "amdfam17h") +X86_CPU_TYPE(INTEL_KNM, "knm") +X86_CPU_TYPE(INTEL_GOLDMONT, "goldmont") +X86_CPU_TYPE(INTEL_GOLDMONT_PLUS, "goldmont-plus") +X86_CPU_TYPE(INTEL_TREMONT, "tremont") +X86_CPU_TYPE(AMDFAM19H, "amdfam19h") + +// Alternate names supported by __builtin_cpu_is and target multiversioning. +X86_CPU_TYPE_ALIAS(INTEL_BONNELL, "atom") +X86_CPU_TYPE_ALIAS(AMDFAM10H, "amdfam10") +X86_CPU_TYPE_ALIAS(AMDFAM15H, "amdfam15") +X86_CPU_TYPE_ALIAS(INTEL_SILVERMONT, "slm") + +#undef X86_CPU_TYPE_ALIAS +#undef X86_CPU_TYPE + +// This macro is used for cpu subtypes present in compiler-rt/libgcc. +#ifndef X86_CPU_SUBTYPE +#define X86_CPU_SUBTYPE(ENUM, STR) +#endif + +// This list must match what is implemented in libgcc and compilert-rt. Clang +// uses this to know how to implement __builtin_cpu_is. +X86_CPU_SUBTYPE(INTEL_COREI7_NEHALEM, "nehalem") +X86_CPU_SUBTYPE(INTEL_COREI7_WESTMERE, "westmere") +X86_CPU_SUBTYPE(INTEL_COREI7_SANDYBRIDGE, "sandybridge") +X86_CPU_SUBTYPE(AMDFAM10H_BARCELONA, "barcelona") +X86_CPU_SUBTYPE(AMDFAM10H_SHANGHAI, "shanghai") +X86_CPU_SUBTYPE(AMDFAM10H_ISTANBUL, "istanbul") +X86_CPU_SUBTYPE(AMDFAM15H_BDVER1, "bdver1") +X86_CPU_SUBTYPE(AMDFAM15H_BDVER2, "bdver2") +X86_CPU_SUBTYPE(AMDFAM15H_BDVER3, "bdver3") +X86_CPU_SUBTYPE(AMDFAM15H_BDVER4, "bdver4") +X86_CPU_SUBTYPE(AMDFAM17H_ZNVER1, "znver1") +X86_CPU_SUBTYPE(INTEL_COREI7_IVYBRIDGE, "ivybridge") +X86_CPU_SUBTYPE(INTEL_COREI7_HASWELL, "haswell") +X86_CPU_SUBTYPE(INTEL_COREI7_BROADWELL, "broadwell") +X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE, "skylake") +X86_CPU_SUBTYPE(INTEL_COREI7_SKYLAKE_AVX512, "skylake-avx512") +X86_CPU_SUBTYPE(INTEL_COREI7_CANNONLAKE, "cannonlake") +X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_CLIENT, "icelake-client") +X86_CPU_SUBTYPE(INTEL_COREI7_ICELAKE_SERVER, "icelake-server") +X86_CPU_SUBTYPE(AMDFAM17H_ZNVER2, "znver2") +X86_CPU_SUBTYPE(INTEL_COREI7_CASCADELAKE, "cascadelake") +X86_CPU_SUBTYPE(INTEL_COREI7_TIGERLAKE, "tigerlake") +X86_CPU_SUBTYPE(INTEL_COREI7_COOPERLAKE, "cooperlake") +X86_CPU_SUBTYPE(INTEL_COREI7_SAPPHIRERAPIDS, "sapphirerapids") +X86_CPU_SUBTYPE(INTEL_COREI7_ALDERLAKE, "alderlake") +X86_CPU_SUBTYPE(AMDFAM19H_ZNVER3, "znver3") +#undef X86_CPU_SUBTYPE + + +// This macro is used for cpu types present in compiler-rt/libgcc. +#ifndef X86_FEATURE_COMPAT +#define X86_FEATURE_COMPAT(ENUM, STR) X86_FEATURE(ENUM, STR) +#endif + +#ifndef X86_FEATURE +#define X86_FEATURE(ENUM, STR) +#endif + +X86_FEATURE_COMPAT(CMOV, "cmov") +X86_FEATURE_COMPAT(MMX, "mmx") +X86_FEATURE_COMPAT(POPCNT, "popcnt") +X86_FEATURE_COMPAT(SSE, "sse") +X86_FEATURE_COMPAT(SSE2, "sse2") +X86_FEATURE_COMPAT(SSE3, "sse3") +X86_FEATURE_COMPAT(SSSE3, "ssse3") +X86_FEATURE_COMPAT(SSE4_1, "sse4.1") +X86_FEATURE_COMPAT(SSE4_2, "sse4.2") +X86_FEATURE_COMPAT(AVX, "avx") +X86_FEATURE_COMPAT(AVX2, "avx2") +X86_FEATURE_COMPAT(SSE4_A, "sse4a") +X86_FEATURE_COMPAT(FMA4, "fma4") +X86_FEATURE_COMPAT(XOP, "xop") +X86_FEATURE_COMPAT(FMA, "fma") +X86_FEATURE_COMPAT(AVX512F, "avx512f") +X86_FEATURE_COMPAT(BMI, "bmi") +X86_FEATURE_COMPAT(BMI2, "bmi2") +X86_FEATURE_COMPAT(AES, "aes") +X86_FEATURE_COMPAT(PCLMUL, "pclmul") +X86_FEATURE_COMPAT(AVX512VL, "avx512vl") +X86_FEATURE_COMPAT(AVX512BW, "avx512bw") +X86_FEATURE_COMPAT(AVX512DQ, "avx512dq") +X86_FEATURE_COMPAT(AVX512CD, "avx512cd") +X86_FEATURE_COMPAT(AVX512ER, "avx512er") +X86_FEATURE_COMPAT(AVX512PF, "avx512pf") +X86_FEATURE_COMPAT(AVX512VBMI, "avx512vbmi") +X86_FEATURE_COMPAT(AVX512IFMA, "avx512ifma") +X86_FEATURE_COMPAT(AVX5124VNNIW, "avx5124vnniw") +X86_FEATURE_COMPAT(AVX5124FMAPS, "avx5124fmaps") +X86_FEATURE_COMPAT(AVX512VPOPCNTDQ, "avx512vpopcntdq") +X86_FEATURE_COMPAT(AVX512VBMI2, "avx512vbmi2") +X86_FEATURE_COMPAT(GFNI, "gfni") +X86_FEATURE_COMPAT(VPCLMULQDQ, "vpclmulqdq") +X86_FEATURE_COMPAT(AVX512VNNI, "avx512vnni") +X86_FEATURE_COMPAT(AVX512BITALG, "avx512bitalg") +X86_FEATURE_COMPAT(AVX512BF16, "avx512bf16") +X86_FEATURE_COMPAT(AVX512VP2INTERSECT, "avx512vp2intersect") +// Features below here are not in libgcc/compiler-rt. +X86_FEATURE (3DNOW, "3dnow") +X86_FEATURE (3DNOWA, "3dnowa") +X86_FEATURE (64BIT, "64bit") +X86_FEATURE (ADX, "adx") +X86_FEATURE (AMX_BF16, "amx-bf16") +X86_FEATURE (AMX_INT8, "amx-int8") +X86_FEATURE (AMX_TILE, "amx-tile") +X86_FEATURE (CLDEMOTE, "cldemote") +X86_FEATURE (CLFLUSHOPT, "clflushopt") +X86_FEATURE (CLWB, "clwb") +X86_FEATURE (CLZERO, "clzero") +X86_FEATURE (CMPXCHG16B, "cx16") +X86_FEATURE (CMPXCHG8B, "cx8") +X86_FEATURE (ENQCMD, "enqcmd") +X86_FEATURE (F16C, "f16c") +X86_FEATURE (FSGSBASE, "fsgsbase") +X86_FEATURE (FXSR, "fxsr") +X86_FEATURE (INVPCID, "invpcid") +X86_FEATURE (KL, "kl") +X86_FEATURE (WIDEKL, "widekl") +X86_FEATURE (LWP, "lwp") +X86_FEATURE (LZCNT, "lzcnt") +X86_FEATURE (MOVBE, "movbe") +X86_FEATURE (MOVDIR64B, "movdir64b") +X86_FEATURE (MOVDIRI, "movdiri") +X86_FEATURE (MWAITX, "mwaitx") +X86_FEATURE (PCONFIG, "pconfig") +X86_FEATURE (PKU, "pku") +X86_FEATURE (PREFETCHWT1, "prefetchwt1") +X86_FEATURE (PRFCHW, "prfchw") +X86_FEATURE (PTWRITE, "ptwrite") +X86_FEATURE (RDPID, "rdpid") +X86_FEATURE (RDRND, "rdrnd") +X86_FEATURE (RDSEED, "rdseed") +X86_FEATURE (RTM, "rtm") +X86_FEATURE (SAHF, "sahf") +X86_FEATURE (SERIALIZE, "serialize") +X86_FEATURE (SGX, "sgx") +X86_FEATURE (SHA, "sha") +X86_FEATURE (SHSTK, "shstk") +X86_FEATURE (TBM, "tbm") +X86_FEATURE (TSXLDTRK, "tsxldtrk") +X86_FEATURE (UINTR, "uintr") +X86_FEATURE (VAES, "vaes") +X86_FEATURE (VZEROUPPER, "vzeroupper") +X86_FEATURE (WAITPKG, "waitpkg") +X86_FEATURE (WBNOINVD, "wbnoinvd") +X86_FEATURE (X87, "x87") +X86_FEATURE (XSAVE, "xsave") +X86_FEATURE (XSAVEC, "xsavec") +X86_FEATURE (XSAVEOPT, "xsaveopt") +X86_FEATURE (XSAVES, "xsaves") +X86_FEATURE (HRESET, "hreset") +X86_FEATURE (AVXVNNI, "avxvnni") +// These features aren't really CPU features, but the frontend can set them. +X86_FEATURE (RETPOLINE_EXTERNAL_THUNK, "retpoline-external-thunk") +X86_FEATURE (RETPOLINE_INDIRECT_BRANCHES, "retpoline-indirect-branches") +X86_FEATURE (RETPOLINE_INDIRECT_CALLS, "retpoline-indirect-calls") +X86_FEATURE (LVI_CFI, "lvi-cfi") +X86_FEATURE (LVI_LOAD_HARDENING, "lvi-load-hardening") +#undef X86_FEATURE_COMPAT +#undef X86_FEATURE |