Restoring authorship annotation for <orivej@yandex-team.ru>. Commit 2 of 2.

6 files changed, 669 insertions, 669 deletions

diff --git a/contrib/libs/libunwind/include/__libunwind_config.h b/contrib/libs/libunwind/include/__libunwind_config.h
index 8d1866874a..e87bcf4003 100644
--- a/contrib/libs/libunwind/include/__libunwind_config.h
+++ b/contrib/libs/libunwind/include/__libunwind_config.h
@@ -1,8 +1,8 @@
 //===----------------------------------------------------------------------===//
 //
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 
-// See https://llvm.org/LICENSE.txt for license information. 
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
@@ -11,139 +11,139 @@
 
 #if defined(__arm__) && !defined(__USING_SJLJ_EXCEPTIONS__) && \
     !defined(__ARM_DWARF_EH__)
-#define _LIBUNWIND_ARM_EHABI 
+#define _LIBUNWIND_ARM_EHABI
 #endif
 
-#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86       8 
-#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86_64    32 
-#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_PPC       112 
-#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_PPC64     116 
-#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM64     95 
-#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM       287 
-#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_OR1K      32 
-#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_MIPS      65 
-#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_SPARC     31 
+#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86       8
+#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86_64    32
+#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_PPC       112
+#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_PPC64     116
+#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM64     95
+#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM       287
+#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_OR1K      32
+#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_MIPS      65
+#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_SPARC     31
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_SPARC64   31
-#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_HEXAGON   34 
-#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_RISCV     64 
+#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_HEXAGON   34
+#define _LIBUNWIND_HIGHEST_DWARF_REGISTER_RISCV     64
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER_VE        143
- 
-#if defined(_LIBUNWIND_IS_NATIVE_ONLY) 
+
+#if defined(_LIBUNWIND_IS_NATIVE_ONLY)
 # if defined(__linux__)
 #  define _LIBUNWIND_TARGET_LINUX 1
 # endif
 # if defined(__i386__)
-#  define _LIBUNWIND_TARGET_I386 
-#  define _LIBUNWIND_CONTEXT_SIZE 8 
-#  define _LIBUNWIND_CURSOR_SIZE 15 
-#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86 
+#  define _LIBUNWIND_TARGET_I386
+#  define _LIBUNWIND_CONTEXT_SIZE 8
+#  define _LIBUNWIND_CURSOR_SIZE 15
+#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86
 # elif defined(__x86_64__)
-#  define _LIBUNWIND_TARGET_X86_64 1 
-#  if defined(_WIN64) 
-#    define _LIBUNWIND_CONTEXT_SIZE 54 
-#    ifdef __SEH__ 
-#      define _LIBUNWIND_CURSOR_SIZE 204 
-#    else 
-#      define _LIBUNWIND_CURSOR_SIZE 66 
-#    endif 
-#  else 
-#    define _LIBUNWIND_CONTEXT_SIZE 21 
-#    define _LIBUNWIND_CURSOR_SIZE 33 
-#  endif 
-#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86_64 
-# elif defined(__powerpc64__) 
-#  define _LIBUNWIND_TARGET_PPC64 1 
-#  define _LIBUNWIND_CONTEXT_SIZE 167 
-#  define _LIBUNWIND_CURSOR_SIZE 179 
-#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_PPC64 
+#  define _LIBUNWIND_TARGET_X86_64 1
+#  if defined(_WIN64)
+#    define _LIBUNWIND_CONTEXT_SIZE 54
+#    ifdef __SEH__
+#      define _LIBUNWIND_CURSOR_SIZE 204
+#    else
+#      define _LIBUNWIND_CURSOR_SIZE 66
+#    endif
+#  else
+#    define _LIBUNWIND_CONTEXT_SIZE 21
+#    define _LIBUNWIND_CURSOR_SIZE 33
+#  endif
+#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_X86_64
+# elif defined(__powerpc64__)
+#  define _LIBUNWIND_TARGET_PPC64 1
+#  define _LIBUNWIND_CONTEXT_SIZE 167
+#  define _LIBUNWIND_CURSOR_SIZE 179
+#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_PPC64
 # elif defined(__powerpc__)
-#  define _LIBUNWIND_TARGET_PPC 1 
-#  define _LIBUNWIND_CONTEXT_SIZE 117 
-#  define _LIBUNWIND_CURSOR_SIZE 124 
-#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_PPC 
+#  define _LIBUNWIND_TARGET_PPC 1
+#  define _LIBUNWIND_CONTEXT_SIZE 117
+#  define _LIBUNWIND_CURSOR_SIZE 124
+#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_PPC
 # elif defined(__aarch64__)
-#  define _LIBUNWIND_TARGET_AARCH64 1 
-#  define _LIBUNWIND_CONTEXT_SIZE 66 
-#  if defined(__SEH__) 
-#    define _LIBUNWIND_CURSOR_SIZE 164 
-#  else 
-#    define _LIBUNWIND_CURSOR_SIZE 78 
-#  endif 
-#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM64 
+#  define _LIBUNWIND_TARGET_AARCH64 1
+#  define _LIBUNWIND_CONTEXT_SIZE 66
+#  if defined(__SEH__)
+#    define _LIBUNWIND_CURSOR_SIZE 164
+#  else
+#    define _LIBUNWIND_CURSOR_SIZE 78
+#  endif
+#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM64
 # elif defined(__arm__)
-#  define _LIBUNWIND_TARGET_ARM 1 
-#  if defined(__SEH__) 
-#    define _LIBUNWIND_CONTEXT_SIZE 42 
-#    define _LIBUNWIND_CURSOR_SIZE 80 
-#  elif defined(__ARM_WMMX) 
-#    define _LIBUNWIND_CONTEXT_SIZE 61 
-#    define _LIBUNWIND_CURSOR_SIZE 68 
-#  else 
-#    define _LIBUNWIND_CONTEXT_SIZE 42 
-#    define _LIBUNWIND_CURSOR_SIZE 49 
-#  endif 
-#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM 
-# elif defined(__or1k__) 
-#  define _LIBUNWIND_TARGET_OR1K 1 
-#  define _LIBUNWIND_CONTEXT_SIZE 16 
-#  define _LIBUNWIND_CURSOR_SIZE 24 
-#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_OR1K 
-# elif defined(__hexagon__) 
-#  define _LIBUNWIND_TARGET_HEXAGON 1 
-// Values here change when : Registers.hpp - hexagon_thread_state_t change 
-#  define _LIBUNWIND_CONTEXT_SIZE 18 
-#  define _LIBUNWIND_CURSOR_SIZE 24 
-#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_HEXAGON 
-# elif defined(__mips__) 
-#  if defined(_ABIO32) && _MIPS_SIM == _ABIO32 
-#    define _LIBUNWIND_TARGET_MIPS_O32 1 
-#    if defined(__mips_hard_float) 
-#      define _LIBUNWIND_CONTEXT_SIZE 50 
-#      define _LIBUNWIND_CURSOR_SIZE 57 
-#    else 
-#      define _LIBUNWIND_CONTEXT_SIZE 18 
-#      define _LIBUNWIND_CURSOR_SIZE 24 
-#    endif 
-#  elif defined(_ABIN32) && _MIPS_SIM == _ABIN32 
-#    define _LIBUNWIND_TARGET_MIPS_NEWABI 1 
-#    if defined(__mips_hard_float) 
-#      define _LIBUNWIND_CONTEXT_SIZE 67 
-#      define _LIBUNWIND_CURSOR_SIZE 74 
-#    else 
-#      define _LIBUNWIND_CONTEXT_SIZE 35 
-#      define _LIBUNWIND_CURSOR_SIZE 42 
-#    endif 
-#  elif defined(_ABI64) && _MIPS_SIM == _ABI64 
-#    define _LIBUNWIND_TARGET_MIPS_NEWABI 1 
-#    if defined(__mips_hard_float) 
-#      define _LIBUNWIND_CONTEXT_SIZE 67 
-#      define _LIBUNWIND_CURSOR_SIZE 79 
-#    else 
-#      define _LIBUNWIND_CONTEXT_SIZE 35 
-#      define _LIBUNWIND_CURSOR_SIZE 47 
-#    endif 
-#  else 
-#    error "Unsupported MIPS ABI and/or environment" 
-#  endif 
-#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_MIPS 
+#  define _LIBUNWIND_TARGET_ARM 1
+#  if defined(__SEH__)
+#    define _LIBUNWIND_CONTEXT_SIZE 42
+#    define _LIBUNWIND_CURSOR_SIZE 80
+#  elif defined(__ARM_WMMX)
+#    define _LIBUNWIND_CONTEXT_SIZE 61
+#    define _LIBUNWIND_CURSOR_SIZE 68
+#  else
+#    define _LIBUNWIND_CONTEXT_SIZE 42
+#    define _LIBUNWIND_CURSOR_SIZE 49
+#  endif
+#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_ARM
+# elif defined(__or1k__)
+#  define _LIBUNWIND_TARGET_OR1K 1
+#  define _LIBUNWIND_CONTEXT_SIZE 16
+#  define _LIBUNWIND_CURSOR_SIZE 24
+#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_OR1K
+# elif defined(__hexagon__)
+#  define _LIBUNWIND_TARGET_HEXAGON 1
+// Values here change when : Registers.hpp - hexagon_thread_state_t change
+#  define _LIBUNWIND_CONTEXT_SIZE 18
+#  define _LIBUNWIND_CURSOR_SIZE 24
+#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_HEXAGON
+# elif defined(__mips__)
+#  if defined(_ABIO32) && _MIPS_SIM == _ABIO32
+#    define _LIBUNWIND_TARGET_MIPS_O32 1
+#    if defined(__mips_hard_float)
+#      define _LIBUNWIND_CONTEXT_SIZE 50
+#      define _LIBUNWIND_CURSOR_SIZE 57
+#    else
+#      define _LIBUNWIND_CONTEXT_SIZE 18
+#      define _LIBUNWIND_CURSOR_SIZE 24
+#    endif
+#  elif defined(_ABIN32) && _MIPS_SIM == _ABIN32
+#    define _LIBUNWIND_TARGET_MIPS_NEWABI 1
+#    if defined(__mips_hard_float)
+#      define _LIBUNWIND_CONTEXT_SIZE 67
+#      define _LIBUNWIND_CURSOR_SIZE 74
+#    else
+#      define _LIBUNWIND_CONTEXT_SIZE 35
+#      define _LIBUNWIND_CURSOR_SIZE 42
+#    endif
+#  elif defined(_ABI64) && _MIPS_SIM == _ABI64
+#    define _LIBUNWIND_TARGET_MIPS_NEWABI 1
+#    if defined(__mips_hard_float)
+#      define _LIBUNWIND_CONTEXT_SIZE 67
+#      define _LIBUNWIND_CURSOR_SIZE 79
+#    else
+#      define _LIBUNWIND_CONTEXT_SIZE 35
+#      define _LIBUNWIND_CURSOR_SIZE 47
+#    endif
+#  else
+#    error "Unsupported MIPS ABI and/or environment"
+#  endif
+#  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_MIPS
 #elif defined(__sparc__) && defined(__arch64__)
 #define _LIBUNWIND_TARGET_SPARC64 1
 #define _LIBUNWIND_HIGHEST_DWARF_REGISTER                                      \
   _LIBUNWIND_HIGHEST_DWARF_REGISTER_SPARC64
 #define _LIBUNWIND_CONTEXT_SIZE 33
 #define _LIBUNWIND_CURSOR_SIZE 45
-# elif defined(__sparc__) 
-  #define _LIBUNWIND_TARGET_SPARC 1 
-  #define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_SPARC 
-  #define _LIBUNWIND_CONTEXT_SIZE 16 
-  #define _LIBUNWIND_CURSOR_SIZE 23 
-# elif defined(__riscv) 
+# elif defined(__sparc__)
+  #define _LIBUNWIND_TARGET_SPARC 1
+  #define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_SPARC
+  #define _LIBUNWIND_CONTEXT_SIZE 16
+  #define _LIBUNWIND_CURSOR_SIZE 23
+# elif defined(__riscv)
 #  define _LIBUNWIND_TARGET_RISCV 1
 #  if defined(__riscv_flen)
 #   define RISCV_FLEN __riscv_flen
-#  else 
+#  else
 #   define RISCV_FLEN 0
-#  endif 
+#  endif
 #  define _LIBUNWIND_CONTEXT_SIZE (32 * (__riscv_xlen + RISCV_FLEN) / 64)
 #  if __riscv_xlen == 32
 #   define _LIBUNWIND_CURSOR_SIZE (_LIBUNWIND_CONTEXT_SIZE + 7)
@@ -152,33 +152,33 @@
 #  else
 #   error "Unsupported RISC-V ABI"
 #  endif
-# define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_RISCV 
+# define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_RISCV
 # elif defined(__ve__)
 #  define _LIBUNWIND_TARGET_VE 1
 #  define _LIBUNWIND_CONTEXT_SIZE 67
 #  define _LIBUNWIND_CURSOR_SIZE 79
 #  define _LIBUNWIND_HIGHEST_DWARF_REGISTER _LIBUNWIND_HIGHEST_DWARF_REGISTER_VE
-# else 
-#  error "Unsupported architecture." 
-# endif 
-#else // !_LIBUNWIND_IS_NATIVE_ONLY 
-# define _LIBUNWIND_TARGET_I386 
-# define _LIBUNWIND_TARGET_X86_64 1 
-# define _LIBUNWIND_TARGET_PPC 1 
-# define _LIBUNWIND_TARGET_PPC64 1 
-# define _LIBUNWIND_TARGET_AARCH64 1 
-# define _LIBUNWIND_TARGET_ARM 1 
-# define _LIBUNWIND_TARGET_OR1K 1 
-# define _LIBUNWIND_TARGET_MIPS_O32 1 
-# define _LIBUNWIND_TARGET_MIPS_NEWABI 1 
-# define _LIBUNWIND_TARGET_SPARC 1 
+# else
+#  error "Unsupported architecture."
+# endif
+#else // !_LIBUNWIND_IS_NATIVE_ONLY
+# define _LIBUNWIND_TARGET_I386
+# define _LIBUNWIND_TARGET_X86_64 1
+# define _LIBUNWIND_TARGET_PPC 1
+# define _LIBUNWIND_TARGET_PPC64 1
+# define _LIBUNWIND_TARGET_AARCH64 1
+# define _LIBUNWIND_TARGET_ARM 1
+# define _LIBUNWIND_TARGET_OR1K 1
+# define _LIBUNWIND_TARGET_MIPS_O32 1
+# define _LIBUNWIND_TARGET_MIPS_NEWABI 1
+# define _LIBUNWIND_TARGET_SPARC 1
 # define _LIBUNWIND_TARGET_SPARC64 1
-# define _LIBUNWIND_TARGET_HEXAGON 1 
-# define _LIBUNWIND_TARGET_RISCV 1 
+# define _LIBUNWIND_TARGET_HEXAGON 1
+# define _LIBUNWIND_TARGET_RISCV 1
 # define _LIBUNWIND_TARGET_VE 1
-# define _LIBUNWIND_CONTEXT_SIZE 167 
-# define _LIBUNWIND_CURSOR_SIZE 179 
-# define _LIBUNWIND_HIGHEST_DWARF_REGISTER 287 
-#endif // _LIBUNWIND_IS_NATIVE_ONLY 
- 
+# define _LIBUNWIND_CONTEXT_SIZE 167
+# define _LIBUNWIND_CURSOR_SIZE 179
+# define _LIBUNWIND_HIGHEST_DWARF_REGISTER 287
+#endif // _LIBUNWIND_IS_NATIVE_ONLY
+
 #endif // ____LIBUNWIND_CONFIG_H__
diff --git a/contrib/libs/libunwind/include/libunwind.h b/contrib/libs/libunwind/include/libunwind.h
index ef88caf664..8303c1a04c 100644
--- a/contrib/libs/libunwind/include/libunwind.h
+++ b/contrib/libs/libunwind/include/libunwind.h
@@ -1,11 +1,11 @@
 //===----------------------------------------------------------------------===//
 //
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 
-// See https://llvm.org/LICENSE.txt for license information. 
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //
-// Compatible with libunwind API documented at: 
+// Compatible with libunwind API documented at:
 //   http://www.nongnu.org/libunwind/man/libunwind(3).html
 //
 //===----------------------------------------------------------------------===//
@@ -19,36 +19,36 @@
 #include <stddef.h>
 
 #ifdef __APPLE__
-  #if __clang__ 
-    #if __has_include(<Availability.h>) 
-      #include <Availability.h> 
-    #endif 
-  #elif __ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ >= 1050 
-    #include <Availability.h> 
-  #endif 
- 
-  #ifdef __arm__ 
-     #define LIBUNWIND_AVAIL __attribute__((unavailable)) 
-  #elif defined(__OSX_AVAILABLE_STARTING) 
-    #define LIBUNWIND_AVAIL __OSX_AVAILABLE_STARTING(__MAC_10_6, __IPHONE_5_0) 
-  #else 
-    #include <AvailabilityMacros.h> 
-    #ifdef AVAILABLE_MAC_OS_X_VERSION_10_6_AND_LATER 
-      #define LIBUNWIND_AVAIL AVAILABLE_MAC_OS_X_VERSION_10_6_AND_LATER 
+  #if __clang__
+    #if __has_include(<Availability.h>)
+      #include <Availability.h>
+    #endif
+  #elif __ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__ >= 1050
+    #include <Availability.h>
+  #endif
+
+  #ifdef __arm__
+     #define LIBUNWIND_AVAIL __attribute__((unavailable))
+  #elif defined(__OSX_AVAILABLE_STARTING)
+    #define LIBUNWIND_AVAIL __OSX_AVAILABLE_STARTING(__MAC_10_6, __IPHONE_5_0)
+  #else
+    #include <AvailabilityMacros.h>
+    #ifdef AVAILABLE_MAC_OS_X_VERSION_10_6_AND_LATER
+      #define LIBUNWIND_AVAIL AVAILABLE_MAC_OS_X_VERSION_10_6_AND_LATER
     #else
-      #define LIBUNWIND_AVAIL __attribute__((unavailable)) 
+      #define LIBUNWIND_AVAIL __attribute__((unavailable))
     #endif
-  #endif 
+  #endif
 #else
   #define LIBUNWIND_AVAIL
 #endif
 
-#if defined(_WIN32) && defined(__SEH__) 
-  #define LIBUNWIND_CURSOR_ALIGNMENT_ATTR __attribute__((__aligned__(16))) 
-#else 
-  #define LIBUNWIND_CURSOR_ALIGNMENT_ATTR 
-#endif 
- 
+#if defined(_WIN32) && defined(__SEH__)
+  #define LIBUNWIND_CURSOR_ALIGNMENT_ATTR __attribute__((__aligned__(16)))
+#else
+  #define LIBUNWIND_CURSOR_ALIGNMENT_ATTR
+#endif
+
 /* error codes */
 enum {
   UNW_ESUCCESS      = 0,     /* no error */
@@ -62,26 +62,26 @@ enum {
   UNW_EINVAL        = -6547, /* unsupported operation or bad value */
   UNW_EBADVERSION   = -6548, /* unwind info has unsupported version */
   UNW_ENOINFO       = -6549  /* no unwind info found */
-#if defined(_LIBUNWIND_TARGET_AARCH64) && !defined(_LIBUNWIND_IS_NATIVE_ONLY) 
-  , UNW_ECROSSRASIGNING = -6550 /* cross unwind with return address signing */ 
-#endif 
+#if defined(_LIBUNWIND_TARGET_AARCH64) && !defined(_LIBUNWIND_IS_NATIVE_ONLY)
+  , UNW_ECROSSRASIGNING = -6550 /* cross unwind with return address signing */
+#endif
 };
 
 struct unw_context_t {
-  uint64_t data[_LIBUNWIND_CONTEXT_SIZE]; 
+  uint64_t data[_LIBUNWIND_CONTEXT_SIZE];
 };
 typedef struct unw_context_t unw_context_t;
 
 struct unw_cursor_t {
-  uint64_t data[_LIBUNWIND_CURSOR_SIZE]; 
-} LIBUNWIND_CURSOR_ALIGNMENT_ATTR; 
+  uint64_t data[_LIBUNWIND_CURSOR_SIZE];
+} LIBUNWIND_CURSOR_ALIGNMENT_ATTR;
 typedef struct unw_cursor_t unw_cursor_t;
 
 typedef struct unw_addr_space *unw_addr_space_t;
 
 typedef int unw_regnum_t;
-typedef uintptr_t unw_word_t; 
-#if defined(__arm__) && !defined(__ARM_DWARF_EH__) 
+typedef uintptr_t unw_word_t;
+#if defined(__arm__) && !defined(__ARM_DWARF_EH__)
 typedef uint64_t unw_fpreg_t;
 #else
 typedef double unw_fpreg_t;
@@ -96,8 +96,8 @@ struct unw_proc_info_t {
   unw_word_t  gp;               /* not used */
   unw_word_t  flags;            /* not used */
   uint32_t    format;           /* compact unwind encoding, or zero if none */
-  uint32_t    unwind_info_size; /* size of DWARF unwind info, or zero if none */ 
-  unw_word_t  unwind_info;      /* address of DWARF unwind info, or zero */ 
+  uint32_t    unwind_info_size; /* size of DWARF unwind info, or zero if none */
+  unw_word_t  unwind_info;      /* address of DWARF unwind info, or zero */
   unw_word_t  extra;            /* mach_header of mach-o image containing func */
 };
 typedef struct unw_proc_info_t unw_proc_info_t;
@@ -169,24 +169,24 @@ enum {
   UNW_X86_64_R12 = 12,
   UNW_X86_64_R13 = 13,
   UNW_X86_64_R14 = 14,
-  UNW_X86_64_R15 = 15, 
-  UNW_X86_64_RIP = 16, 
-  UNW_X86_64_XMM0 = 17, 
-  UNW_X86_64_XMM1 = 18, 
-  UNW_X86_64_XMM2 = 19, 
-  UNW_X86_64_XMM3 = 20, 
-  UNW_X86_64_XMM4 = 21, 
-  UNW_X86_64_XMM5 = 22, 
-  UNW_X86_64_XMM6 = 23, 
-  UNW_X86_64_XMM7 = 24, 
-  UNW_X86_64_XMM8 = 25, 
-  UNW_X86_64_XMM9 = 26, 
-  UNW_X86_64_XMM10 = 27, 
-  UNW_X86_64_XMM11 = 28, 
-  UNW_X86_64_XMM12 = 29, 
-  UNW_X86_64_XMM13 = 30, 
-  UNW_X86_64_XMM14 = 31, 
-  UNW_X86_64_XMM15 = 32, 
+  UNW_X86_64_R15 = 15,
+  UNW_X86_64_RIP = 16,
+  UNW_X86_64_XMM0 = 17,
+  UNW_X86_64_XMM1 = 18,
+  UNW_X86_64_XMM2 = 19,
+  UNW_X86_64_XMM3 = 20,
+  UNW_X86_64_XMM4 = 21,
+  UNW_X86_64_XMM5 = 22,
+  UNW_X86_64_XMM6 = 23,
+  UNW_X86_64_XMM7 = 24,
+  UNW_X86_64_XMM8 = 25,
+  UNW_X86_64_XMM9 = 26,
+  UNW_X86_64_XMM10 = 27,
+  UNW_X86_64_XMM11 = 28,
+  UNW_X86_64_XMM12 = 29,
+  UNW_X86_64_XMM13 = 30,
+  UNW_X86_64_XMM14 = 31,
+  UNW_X86_64_XMM15 = 32,
 };
 
 
@@ -307,190 +307,190 @@ enum {
   UNW_PPC_SPEFSCR = 112
 };
 
-// 64-bit ppc register numbers 
-enum { 
-  UNW_PPC64_R0      = 0, 
-  UNW_PPC64_R1      = 1, 
-  UNW_PPC64_R2      = 2, 
-  UNW_PPC64_R3      = 3, 
-  UNW_PPC64_R4      = 4, 
-  UNW_PPC64_R5      = 5, 
-  UNW_PPC64_R6      = 6, 
-  UNW_PPC64_R7      = 7, 
-  UNW_PPC64_R8      = 8, 
-  UNW_PPC64_R9      = 9, 
-  UNW_PPC64_R10     = 10, 
-  UNW_PPC64_R11     = 11, 
-  UNW_PPC64_R12     = 12, 
-  UNW_PPC64_R13     = 13, 
-  UNW_PPC64_R14     = 14, 
-  UNW_PPC64_R15     = 15, 
-  UNW_PPC64_R16     = 16, 
-  UNW_PPC64_R17     = 17, 
-  UNW_PPC64_R18     = 18, 
-  UNW_PPC64_R19     = 19, 
-  UNW_PPC64_R20     = 20, 
-  UNW_PPC64_R21     = 21, 
-  UNW_PPC64_R22     = 22, 
-  UNW_PPC64_R23     = 23, 
-  UNW_PPC64_R24     = 24, 
-  UNW_PPC64_R25     = 25, 
-  UNW_PPC64_R26     = 26, 
-  UNW_PPC64_R27     = 27, 
-  UNW_PPC64_R28     = 28, 
-  UNW_PPC64_R29     = 29, 
-  UNW_PPC64_R30     = 30, 
-  UNW_PPC64_R31     = 31, 
-  UNW_PPC64_F0      = 32, 
-  UNW_PPC64_F1      = 33, 
-  UNW_PPC64_F2      = 34, 
-  UNW_PPC64_F3      = 35, 
-  UNW_PPC64_F4      = 36, 
-  UNW_PPC64_F5      = 37, 
-  UNW_PPC64_F6      = 38, 
-  UNW_PPC64_F7      = 39, 
-  UNW_PPC64_F8      = 40, 
-  UNW_PPC64_F9      = 41, 
-  UNW_PPC64_F10     = 42, 
-  UNW_PPC64_F11     = 43, 
-  UNW_PPC64_F12     = 44, 
-  UNW_PPC64_F13     = 45, 
-  UNW_PPC64_F14     = 46, 
-  UNW_PPC64_F15     = 47, 
-  UNW_PPC64_F16     = 48, 
-  UNW_PPC64_F17     = 49, 
-  UNW_PPC64_F18     = 50, 
-  UNW_PPC64_F19     = 51, 
-  UNW_PPC64_F20     = 52, 
-  UNW_PPC64_F21     = 53, 
-  UNW_PPC64_F22     = 54, 
-  UNW_PPC64_F23     = 55, 
-  UNW_PPC64_F24     = 56, 
-  UNW_PPC64_F25     = 57, 
-  UNW_PPC64_F26     = 58, 
-  UNW_PPC64_F27     = 59, 
-  UNW_PPC64_F28     = 60, 
-  UNW_PPC64_F29     = 61, 
-  UNW_PPC64_F30     = 62, 
-  UNW_PPC64_F31     = 63, 
-  // 64: reserved 
-  UNW_PPC64_LR      = 65, 
-  UNW_PPC64_CTR     = 66, 
-  // 67: reserved 
-  UNW_PPC64_CR0     = 68, 
-  UNW_PPC64_CR1     = 69, 
-  UNW_PPC64_CR2     = 70, 
-  UNW_PPC64_CR3     = 71, 
-  UNW_PPC64_CR4     = 72, 
-  UNW_PPC64_CR5     = 73, 
-  UNW_PPC64_CR6     = 74, 
-  UNW_PPC64_CR7     = 75, 
-  UNW_PPC64_XER     = 76, 
-  UNW_PPC64_V0      = 77, 
-  UNW_PPC64_V1      = 78, 
-  UNW_PPC64_V2      = 79, 
-  UNW_PPC64_V3      = 80, 
-  UNW_PPC64_V4      = 81, 
-  UNW_PPC64_V5      = 82, 
-  UNW_PPC64_V6      = 83, 
-  UNW_PPC64_V7      = 84, 
-  UNW_PPC64_V8      = 85, 
-  UNW_PPC64_V9      = 86, 
-  UNW_PPC64_V10     = 87, 
-  UNW_PPC64_V11     = 88, 
-  UNW_PPC64_V12     = 89, 
-  UNW_PPC64_V13     = 90, 
-  UNW_PPC64_V14     = 91, 
-  UNW_PPC64_V15     = 92, 
-  UNW_PPC64_V16     = 93, 
-  UNW_PPC64_V17     = 94, 
-  UNW_PPC64_V18     = 95, 
-  UNW_PPC64_V19     = 96, 
-  UNW_PPC64_V20     = 97, 
-  UNW_PPC64_V21     = 98, 
-  UNW_PPC64_V22     = 99, 
-  UNW_PPC64_V23     = 100, 
-  UNW_PPC64_V24     = 101, 
-  UNW_PPC64_V25     = 102, 
-  UNW_PPC64_V26     = 103, 
-  UNW_PPC64_V27     = 104, 
-  UNW_PPC64_V28     = 105, 
-  UNW_PPC64_V29     = 106, 
-  UNW_PPC64_V30     = 107, 
-  UNW_PPC64_V31     = 108, 
-  // 109, 111-113: OpenPOWER ELF V2 ABI: reserved 
-  // Borrowing VRSAVE number from PPC32. 
-  UNW_PPC64_VRSAVE  = 109, 
-  UNW_PPC64_VSCR    = 110, 
-  UNW_PPC64_TFHAR   = 114, 
-  UNW_PPC64_TFIAR   = 115, 
-  UNW_PPC64_TEXASR  = 116, 
-  UNW_PPC64_VS0     = UNW_PPC64_F0, 
-  UNW_PPC64_VS1     = UNW_PPC64_F1, 
-  UNW_PPC64_VS2     = UNW_PPC64_F2, 
-  UNW_PPC64_VS3     = UNW_PPC64_F3, 
-  UNW_PPC64_VS4     = UNW_PPC64_F4, 
-  UNW_PPC64_VS5     = UNW_PPC64_F5, 
-  UNW_PPC64_VS6     = UNW_PPC64_F6, 
-  UNW_PPC64_VS7     = UNW_PPC64_F7, 
-  UNW_PPC64_VS8     = UNW_PPC64_F8, 
-  UNW_PPC64_VS9     = UNW_PPC64_F9, 
-  UNW_PPC64_VS10    = UNW_PPC64_F10, 
-  UNW_PPC64_VS11    = UNW_PPC64_F11, 
-  UNW_PPC64_VS12    = UNW_PPC64_F12, 
-  UNW_PPC64_VS13    = UNW_PPC64_F13, 
-  UNW_PPC64_VS14    = UNW_PPC64_F14, 
-  UNW_PPC64_VS15    = UNW_PPC64_F15, 
-  UNW_PPC64_VS16    = UNW_PPC64_F16, 
-  UNW_PPC64_VS17    = UNW_PPC64_F17, 
-  UNW_PPC64_VS18    = UNW_PPC64_F18, 
-  UNW_PPC64_VS19    = UNW_PPC64_F19, 
-  UNW_PPC64_VS20    = UNW_PPC64_F20, 
-  UNW_PPC64_VS21    = UNW_PPC64_F21, 
-  UNW_PPC64_VS22    = UNW_PPC64_F22, 
-  UNW_PPC64_VS23    = UNW_PPC64_F23, 
-  UNW_PPC64_VS24    = UNW_PPC64_F24, 
-  UNW_PPC64_VS25    = UNW_PPC64_F25, 
-  UNW_PPC64_VS26    = UNW_PPC64_F26, 
-  UNW_PPC64_VS27    = UNW_PPC64_F27, 
-  UNW_PPC64_VS28    = UNW_PPC64_F28, 
-  UNW_PPC64_VS29    = UNW_PPC64_F29, 
-  UNW_PPC64_VS30    = UNW_PPC64_F30, 
-  UNW_PPC64_VS31    = UNW_PPC64_F31, 
-  UNW_PPC64_VS32    = UNW_PPC64_V0, 
-  UNW_PPC64_VS33    = UNW_PPC64_V1, 
-  UNW_PPC64_VS34    = UNW_PPC64_V2, 
-  UNW_PPC64_VS35    = UNW_PPC64_V3, 
-  UNW_PPC64_VS36    = UNW_PPC64_V4, 
-  UNW_PPC64_VS37    = UNW_PPC64_V5, 
-  UNW_PPC64_VS38    = UNW_PPC64_V6, 
-  UNW_PPC64_VS39    = UNW_PPC64_V7, 
-  UNW_PPC64_VS40    = UNW_PPC64_V8, 
-  UNW_PPC64_VS41    = UNW_PPC64_V9, 
-  UNW_PPC64_VS42    = UNW_PPC64_V10, 
-  UNW_PPC64_VS43    = UNW_PPC64_V11, 
-  UNW_PPC64_VS44    = UNW_PPC64_V12, 
-  UNW_PPC64_VS45    = UNW_PPC64_V13, 
-  UNW_PPC64_VS46    = UNW_PPC64_V14, 
-  UNW_PPC64_VS47    = UNW_PPC64_V15, 
-  UNW_PPC64_VS48    = UNW_PPC64_V16, 
-  UNW_PPC64_VS49    = UNW_PPC64_V17, 
-  UNW_PPC64_VS50    = UNW_PPC64_V18, 
-  UNW_PPC64_VS51    = UNW_PPC64_V19, 
-  UNW_PPC64_VS52    = UNW_PPC64_V20, 
-  UNW_PPC64_VS53    = UNW_PPC64_V21, 
-  UNW_PPC64_VS54    = UNW_PPC64_V22, 
-  UNW_PPC64_VS55    = UNW_PPC64_V23, 
-  UNW_PPC64_VS56    = UNW_PPC64_V24, 
-  UNW_PPC64_VS57    = UNW_PPC64_V25, 
-  UNW_PPC64_VS58    = UNW_PPC64_V26, 
-  UNW_PPC64_VS59    = UNW_PPC64_V27, 
-  UNW_PPC64_VS60    = UNW_PPC64_V28, 
-  UNW_PPC64_VS61    = UNW_PPC64_V29, 
-  UNW_PPC64_VS62    = UNW_PPC64_V30, 
-  UNW_PPC64_VS63    = UNW_PPC64_V31 
-}; 
- 
+// 64-bit ppc register numbers
+enum {
+  UNW_PPC64_R0      = 0,
+  UNW_PPC64_R1      = 1,
+  UNW_PPC64_R2      = 2,
+  UNW_PPC64_R3      = 3,
+  UNW_PPC64_R4      = 4,
+  UNW_PPC64_R5      = 5,
+  UNW_PPC64_R6      = 6,
+  UNW_PPC64_R7      = 7,
+  UNW_PPC64_R8      = 8,
+  UNW_PPC64_R9      = 9,
+  UNW_PPC64_R10     = 10,
+  UNW_PPC64_R11     = 11,
+  UNW_PPC64_R12     = 12,
+  UNW_PPC64_R13     = 13,
+  UNW_PPC64_R14     = 14,
+  UNW_PPC64_R15     = 15,
+  UNW_PPC64_R16     = 16,
+  UNW_PPC64_R17     = 17,
+  UNW_PPC64_R18     = 18,
+  UNW_PPC64_R19     = 19,
+  UNW_PPC64_R20     = 20,
+  UNW_PPC64_R21     = 21,
+  UNW_PPC64_R22     = 22,
+  UNW_PPC64_R23     = 23,
+  UNW_PPC64_R24     = 24,
+  UNW_PPC64_R25     = 25,
+  UNW_PPC64_R26     = 26,
+  UNW_PPC64_R27     = 27,
+  UNW_PPC64_R28     = 28,
+  UNW_PPC64_R29     = 29,
+  UNW_PPC64_R30     = 30,
+  UNW_PPC64_R31     = 31,
+  UNW_PPC64_F0      = 32,
+  UNW_PPC64_F1      = 33,
+  UNW_PPC64_F2      = 34,
+  UNW_PPC64_F3      = 35,
+  UNW_PPC64_F4      = 36,
+  UNW_PPC64_F5      = 37,
+  UNW_PPC64_F6      = 38,
+  UNW_PPC64_F7      = 39,
+  UNW_PPC64_F8      = 40,
+  UNW_PPC64_F9      = 41,
+  UNW_PPC64_F10     = 42,
+  UNW_PPC64_F11     = 43,
+  UNW_PPC64_F12     = 44,
+  UNW_PPC64_F13     = 45,
+  UNW_PPC64_F14     = 46,
+  UNW_PPC64_F15     = 47,
+  UNW_PPC64_F16     = 48,
+  UNW_PPC64_F17     = 49,
+  UNW_PPC64_F18     = 50,
+  UNW_PPC64_F19     = 51,
+  UNW_PPC64_F20     = 52,
+  UNW_PPC64_F21     = 53,
+  UNW_PPC64_F22     = 54,
+  UNW_PPC64_F23     = 55,
+  UNW_PPC64_F24     = 56,
+  UNW_PPC64_F25     = 57,
+  UNW_PPC64_F26     = 58,
+  UNW_PPC64_F27     = 59,
+  UNW_PPC64_F28     = 60,
+  UNW_PPC64_F29     = 61,
+  UNW_PPC64_F30     = 62,
+  UNW_PPC64_F31     = 63,
+  // 64: reserved
+  UNW_PPC64_LR      = 65,
+  UNW_PPC64_CTR     = 66,
+  // 67: reserved
+  UNW_PPC64_CR0     = 68,
+  UNW_PPC64_CR1     = 69,
+  UNW_PPC64_CR2     = 70,
+  UNW_PPC64_CR3     = 71,
+  UNW_PPC64_CR4     = 72,
+  UNW_PPC64_CR5     = 73,
+  UNW_PPC64_CR6     = 74,
+  UNW_PPC64_CR7     = 75,
+  UNW_PPC64_XER     = 76,
+  UNW_PPC64_V0      = 77,
+  UNW_PPC64_V1      = 78,
+  UNW_PPC64_V2      = 79,
+  UNW_PPC64_V3      = 80,
+  UNW_PPC64_V4      = 81,
+  UNW_PPC64_V5      = 82,
+  UNW_PPC64_V6      = 83,
+  UNW_PPC64_V7      = 84,
+  UNW_PPC64_V8      = 85,
+  UNW_PPC64_V9      = 86,
+  UNW_PPC64_V10     = 87,
+  UNW_PPC64_V11     = 88,
+  UNW_PPC64_V12     = 89,
+  UNW_PPC64_V13     = 90,
+  UNW_PPC64_V14     = 91,
+  UNW_PPC64_V15     = 92,
+  UNW_PPC64_V16     = 93,
+  UNW_PPC64_V17     = 94,
+  UNW_PPC64_V18     = 95,
+  UNW_PPC64_V19     = 96,
+  UNW_PPC64_V20     = 97,
+  UNW_PPC64_V21     = 98,
+  UNW_PPC64_V22     = 99,
+  UNW_PPC64_V23     = 100,
+  UNW_PPC64_V24     = 101,
+  UNW_PPC64_V25     = 102,
+  UNW_PPC64_V26     = 103,
+  UNW_PPC64_V27     = 104,
+  UNW_PPC64_V28     = 105,
+  UNW_PPC64_V29     = 106,
+  UNW_PPC64_V30     = 107,
+  UNW_PPC64_V31     = 108,
+  // 109, 111-113: OpenPOWER ELF V2 ABI: reserved
+  // Borrowing VRSAVE number from PPC32.
+  UNW_PPC64_VRSAVE  = 109,
+  UNW_PPC64_VSCR    = 110,
+  UNW_PPC64_TFHAR   = 114,
+  UNW_PPC64_TFIAR   = 115,
+  UNW_PPC64_TEXASR  = 116,
+  UNW_PPC64_VS0     = UNW_PPC64_F0,
+  UNW_PPC64_VS1     = UNW_PPC64_F1,
+  UNW_PPC64_VS2     = UNW_PPC64_F2,
+  UNW_PPC64_VS3     = UNW_PPC64_F3,
+  UNW_PPC64_VS4     = UNW_PPC64_F4,
+  UNW_PPC64_VS5     = UNW_PPC64_F5,
+  UNW_PPC64_VS6     = UNW_PPC64_F6,
+  UNW_PPC64_VS7     = UNW_PPC64_F7,
+  UNW_PPC64_VS8     = UNW_PPC64_F8,
+  UNW_PPC64_VS9     = UNW_PPC64_F9,
+  UNW_PPC64_VS10    = UNW_PPC64_F10,
+  UNW_PPC64_VS11    = UNW_PPC64_F11,
+  UNW_PPC64_VS12    = UNW_PPC64_F12,
+  UNW_PPC64_VS13    = UNW_PPC64_F13,
+  UNW_PPC64_VS14    = UNW_PPC64_F14,
+  UNW_PPC64_VS15    = UNW_PPC64_F15,
+  UNW_PPC64_VS16    = UNW_PPC64_F16,
+  UNW_PPC64_VS17    = UNW_PPC64_F17,
+  UNW_PPC64_VS18    = UNW_PPC64_F18,
+  UNW_PPC64_VS19    = UNW_PPC64_F19,
+  UNW_PPC64_VS20    = UNW_PPC64_F20,
+  UNW_PPC64_VS21    = UNW_PPC64_F21,
+  UNW_PPC64_VS22    = UNW_PPC64_F22,
+  UNW_PPC64_VS23    = UNW_PPC64_F23,
+  UNW_PPC64_VS24    = UNW_PPC64_F24,
+  UNW_PPC64_VS25    = UNW_PPC64_F25,
+  UNW_PPC64_VS26    = UNW_PPC64_F26,
+  UNW_PPC64_VS27    = UNW_PPC64_F27,
+  UNW_PPC64_VS28    = UNW_PPC64_F28,
+  UNW_PPC64_VS29    = UNW_PPC64_F29,
+  UNW_PPC64_VS30    = UNW_PPC64_F30,
+  UNW_PPC64_VS31    = UNW_PPC64_F31,
+  UNW_PPC64_VS32    = UNW_PPC64_V0,
+  UNW_PPC64_VS33    = UNW_PPC64_V1,
+  UNW_PPC64_VS34    = UNW_PPC64_V2,
+  UNW_PPC64_VS35    = UNW_PPC64_V3,
+  UNW_PPC64_VS36    = UNW_PPC64_V4,
+  UNW_PPC64_VS37    = UNW_PPC64_V5,
+  UNW_PPC64_VS38    = UNW_PPC64_V6,
+  UNW_PPC64_VS39    = UNW_PPC64_V7,
+  UNW_PPC64_VS40    = UNW_PPC64_V8,
+  UNW_PPC64_VS41    = UNW_PPC64_V9,
+  UNW_PPC64_VS42    = UNW_PPC64_V10,
+  UNW_PPC64_VS43    = UNW_PPC64_V11,
+  UNW_PPC64_VS44    = UNW_PPC64_V12,
+  UNW_PPC64_VS45    = UNW_PPC64_V13,
+  UNW_PPC64_VS46    = UNW_PPC64_V14,
+  UNW_PPC64_VS47    = UNW_PPC64_V15,
+  UNW_PPC64_VS48    = UNW_PPC64_V16,
+  UNW_PPC64_VS49    = UNW_PPC64_V17,
+  UNW_PPC64_VS50    = UNW_PPC64_V18,
+  UNW_PPC64_VS51    = UNW_PPC64_V19,
+  UNW_PPC64_VS52    = UNW_PPC64_V20,
+  UNW_PPC64_VS53    = UNW_PPC64_V21,
+  UNW_PPC64_VS54    = UNW_PPC64_V22,
+  UNW_PPC64_VS55    = UNW_PPC64_V23,
+  UNW_PPC64_VS56    = UNW_PPC64_V24,
+  UNW_PPC64_VS57    = UNW_PPC64_V25,
+  UNW_PPC64_VS58    = UNW_PPC64_V26,
+  UNW_PPC64_VS59    = UNW_PPC64_V27,
+  UNW_PPC64_VS60    = UNW_PPC64_V28,
+  UNW_PPC64_VS61    = UNW_PPC64_V29,
+  UNW_PPC64_VS62    = UNW_PPC64_V30,
+  UNW_PPC64_VS63    = UNW_PPC64_V31
+};
+
 // 64-bit ARM64 registers
 enum {
   UNW_AARCH64_X0 = 0,
@@ -804,224 +804,224 @@ enum {
   UNW_OR1K_R29 = 29,
   UNW_OR1K_R30 = 30,
   UNW_OR1K_R31 = 31,
-  UNW_OR1K_EPCR = 32, 
+  UNW_OR1K_EPCR = 32,
+};
+
+// MIPS registers
+enum {
+  UNW_MIPS_R0  = 0,
+  UNW_MIPS_R1  = 1,
+  UNW_MIPS_R2  = 2,
+  UNW_MIPS_R3  = 3,
+  UNW_MIPS_R4  = 4,
+  UNW_MIPS_R5  = 5,
+  UNW_MIPS_R6  = 6,
+  UNW_MIPS_R7  = 7,
+  UNW_MIPS_R8  = 8,
+  UNW_MIPS_R9  = 9,
+  UNW_MIPS_R10 = 10,
+  UNW_MIPS_R11 = 11,
+  UNW_MIPS_R12 = 12,
+  UNW_MIPS_R13 = 13,
+  UNW_MIPS_R14 = 14,
+  UNW_MIPS_R15 = 15,
+  UNW_MIPS_R16 = 16,
+  UNW_MIPS_R17 = 17,
+  UNW_MIPS_R18 = 18,
+  UNW_MIPS_R19 = 19,
+  UNW_MIPS_R20 = 20,
+  UNW_MIPS_R21 = 21,
+  UNW_MIPS_R22 = 22,
+  UNW_MIPS_R23 = 23,
+  UNW_MIPS_R24 = 24,
+  UNW_MIPS_R25 = 25,
+  UNW_MIPS_R26 = 26,
+  UNW_MIPS_R27 = 27,
+  UNW_MIPS_R28 = 28,
+  UNW_MIPS_R29 = 29,
+  UNW_MIPS_R30 = 30,
+  UNW_MIPS_R31 = 31,
+  UNW_MIPS_F0  = 32,
+  UNW_MIPS_F1  = 33,
+  UNW_MIPS_F2  = 34,
+  UNW_MIPS_F3  = 35,
+  UNW_MIPS_F4  = 36,
+  UNW_MIPS_F5  = 37,
+  UNW_MIPS_F6  = 38,
+  UNW_MIPS_F7  = 39,
+  UNW_MIPS_F8  = 40,
+  UNW_MIPS_F9  = 41,
+  UNW_MIPS_F10 = 42,
+  UNW_MIPS_F11 = 43,
+  UNW_MIPS_F12 = 44,
+  UNW_MIPS_F13 = 45,
+  UNW_MIPS_F14 = 46,
+  UNW_MIPS_F15 = 47,
+  UNW_MIPS_F16 = 48,
+  UNW_MIPS_F17 = 49,
+  UNW_MIPS_F18 = 50,
+  UNW_MIPS_F19 = 51,
+  UNW_MIPS_F20 = 52,
+  UNW_MIPS_F21 = 53,
+  UNW_MIPS_F22 = 54,
+  UNW_MIPS_F23 = 55,
+  UNW_MIPS_F24 = 56,
+  UNW_MIPS_F25 = 57,
+  UNW_MIPS_F26 = 58,
+  UNW_MIPS_F27 = 59,
+  UNW_MIPS_F28 = 60,
+  UNW_MIPS_F29 = 61,
+  UNW_MIPS_F30 = 62,
+  UNW_MIPS_F31 = 63,
+  UNW_MIPS_HI = 64,
+  UNW_MIPS_LO = 65,
+};
+
+// SPARC registers
+enum {
+  UNW_SPARC_G0 = 0,
+  UNW_SPARC_G1 = 1,
+  UNW_SPARC_G2 = 2,
+  UNW_SPARC_G3 = 3,
+  UNW_SPARC_G4 = 4,
+  UNW_SPARC_G5 = 5,
+  UNW_SPARC_G6 = 6,
+  UNW_SPARC_G7 = 7,
+  UNW_SPARC_O0 = 8,
+  UNW_SPARC_O1 = 9,
+  UNW_SPARC_O2 = 10,
+  UNW_SPARC_O3 = 11,
+  UNW_SPARC_O4 = 12,
+  UNW_SPARC_O5 = 13,
+  UNW_SPARC_O6 = 14,
+  UNW_SPARC_O7 = 15,
+  UNW_SPARC_L0 = 16,
+  UNW_SPARC_L1 = 17,
+  UNW_SPARC_L2 = 18,
+  UNW_SPARC_L3 = 19,
+  UNW_SPARC_L4 = 20,
+  UNW_SPARC_L5 = 21,
+  UNW_SPARC_L6 = 22,
+  UNW_SPARC_L7 = 23,
+  UNW_SPARC_I0 = 24,
+  UNW_SPARC_I1 = 25,
+  UNW_SPARC_I2 = 26,
+  UNW_SPARC_I3 = 27,
+  UNW_SPARC_I4 = 28,
+  UNW_SPARC_I5 = 29,
+  UNW_SPARC_I6 = 30,
+  UNW_SPARC_I7 = 31,
+};
+
+// Hexagon register numbers
+enum {
+  UNW_HEXAGON_R0,
+  UNW_HEXAGON_R1,
+  UNW_HEXAGON_R2,
+  UNW_HEXAGON_R3,
+  UNW_HEXAGON_R4,
+  UNW_HEXAGON_R5,
+  UNW_HEXAGON_R6,
+  UNW_HEXAGON_R7,
+  UNW_HEXAGON_R8,
+  UNW_HEXAGON_R9,
+  UNW_HEXAGON_R10,
+  UNW_HEXAGON_R11,
+  UNW_HEXAGON_R12,
+  UNW_HEXAGON_R13,
+  UNW_HEXAGON_R14,
+  UNW_HEXAGON_R15,
+  UNW_HEXAGON_R16,
+  UNW_HEXAGON_R17,
+  UNW_HEXAGON_R18,
+  UNW_HEXAGON_R19,
+  UNW_HEXAGON_R20,
+  UNW_HEXAGON_R21,
+  UNW_HEXAGON_R22,
+  UNW_HEXAGON_R23,
+  UNW_HEXAGON_R24,
+  UNW_HEXAGON_R25,
+  UNW_HEXAGON_R26,
+  UNW_HEXAGON_R27,
+  UNW_HEXAGON_R28,
+  UNW_HEXAGON_R29,
+  UNW_HEXAGON_R30,
+  UNW_HEXAGON_R31,
+  UNW_HEXAGON_P3_0,
+  UNW_HEXAGON_PC,
+};
+
+// RISC-V registers. These match the DWARF register numbers defined by section
+// 4 of the RISC-V ELF psABI specification, which can be found at:
+//
+// https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md
+enum {
+  UNW_RISCV_X0  = 0,
+  UNW_RISCV_X1  = 1,
+  UNW_RISCV_X2  = 2,
+  UNW_RISCV_X3  = 3,
+  UNW_RISCV_X4  = 4,
+  UNW_RISCV_X5  = 5,
+  UNW_RISCV_X6  = 6,
+  UNW_RISCV_X7  = 7,
+  UNW_RISCV_X8  = 8,
+  UNW_RISCV_X9  = 9,
+  UNW_RISCV_X10 = 10,
+  UNW_RISCV_X11 = 11,
+  UNW_RISCV_X12 = 12,
+  UNW_RISCV_X13 = 13,
+  UNW_RISCV_X14 = 14,
+  UNW_RISCV_X15 = 15,
+  UNW_RISCV_X16 = 16,
+  UNW_RISCV_X17 = 17,
+  UNW_RISCV_X18 = 18,
+  UNW_RISCV_X19 = 19,
+  UNW_RISCV_X20 = 20,
+  UNW_RISCV_X21 = 21,
+  UNW_RISCV_X22 = 22,
+  UNW_RISCV_X23 = 23,
+  UNW_RISCV_X24 = 24,
+  UNW_RISCV_X25 = 25,
+  UNW_RISCV_X26 = 26,
+  UNW_RISCV_X27 = 27,
+  UNW_RISCV_X28 = 28,
+  UNW_RISCV_X29 = 29,
+  UNW_RISCV_X30 = 30,
+  UNW_RISCV_X31 = 31,
+  UNW_RISCV_F0  = 32,
+  UNW_RISCV_F1  = 33,
+  UNW_RISCV_F2  = 34,
+  UNW_RISCV_F3  = 35,
+  UNW_RISCV_F4  = 36,
+  UNW_RISCV_F5  = 37,
+  UNW_RISCV_F6  = 38,
+  UNW_RISCV_F7  = 39,
+  UNW_RISCV_F8  = 40,
+  UNW_RISCV_F9  = 41,
+  UNW_RISCV_F10 = 42,
+  UNW_RISCV_F11 = 43,
+  UNW_RISCV_F12 = 44,
+  UNW_RISCV_F13 = 45,
+  UNW_RISCV_F14 = 46,
+  UNW_RISCV_F15 = 47,
+  UNW_RISCV_F16 = 48,
+  UNW_RISCV_F17 = 49,
+  UNW_RISCV_F18 = 50,
+  UNW_RISCV_F19 = 51,
+  UNW_RISCV_F20 = 52,
+  UNW_RISCV_F21 = 53,
+  UNW_RISCV_F22 = 54,
+  UNW_RISCV_F23 = 55,
+  UNW_RISCV_F24 = 56,
+  UNW_RISCV_F25 = 57,
+  UNW_RISCV_F26 = 58,
+  UNW_RISCV_F27 = 59,
+  UNW_RISCV_F28 = 60,
+  UNW_RISCV_F29 = 61,
+  UNW_RISCV_F30 = 62,
+  UNW_RISCV_F31 = 63,
 };
 
-// MIPS registers 
-enum { 
-  UNW_MIPS_R0  = 0, 
-  UNW_MIPS_R1  = 1, 
-  UNW_MIPS_R2  = 2, 
-  UNW_MIPS_R3  = 3, 
-  UNW_MIPS_R4  = 4, 
-  UNW_MIPS_R5  = 5, 
-  UNW_MIPS_R6  = 6, 
-  UNW_MIPS_R7  = 7, 
-  UNW_MIPS_R8  = 8, 
-  UNW_MIPS_R9  = 9, 
-  UNW_MIPS_R10 = 10, 
-  UNW_MIPS_R11 = 11, 
-  UNW_MIPS_R12 = 12, 
-  UNW_MIPS_R13 = 13, 
-  UNW_MIPS_R14 = 14, 
-  UNW_MIPS_R15 = 15, 
-  UNW_MIPS_R16 = 16, 
-  UNW_MIPS_R17 = 17, 
-  UNW_MIPS_R18 = 18, 
-  UNW_MIPS_R19 = 19, 
-  UNW_MIPS_R20 = 20, 
-  UNW_MIPS_R21 = 21, 
-  UNW_MIPS_R22 = 22, 
-  UNW_MIPS_R23 = 23, 
-  UNW_MIPS_R24 = 24, 
-  UNW_MIPS_R25 = 25, 
-  UNW_MIPS_R26 = 26, 
-  UNW_MIPS_R27 = 27, 
-  UNW_MIPS_R28 = 28, 
-  UNW_MIPS_R29 = 29, 
-  UNW_MIPS_R30 = 30, 
-  UNW_MIPS_R31 = 31, 
-  UNW_MIPS_F0  = 32, 
-  UNW_MIPS_F1  = 33, 
-  UNW_MIPS_F2  = 34, 
-  UNW_MIPS_F3  = 35, 
-  UNW_MIPS_F4  = 36, 
-  UNW_MIPS_F5  = 37, 
-  UNW_MIPS_F6  = 38, 
-  UNW_MIPS_F7  = 39, 
-  UNW_MIPS_F8  = 40, 
-  UNW_MIPS_F9  = 41, 
-  UNW_MIPS_F10 = 42, 
-  UNW_MIPS_F11 = 43, 
-  UNW_MIPS_F12 = 44, 
-  UNW_MIPS_F13 = 45, 
-  UNW_MIPS_F14 = 46, 
-  UNW_MIPS_F15 = 47, 
-  UNW_MIPS_F16 = 48, 
-  UNW_MIPS_F17 = 49, 
-  UNW_MIPS_F18 = 50, 
-  UNW_MIPS_F19 = 51, 
-  UNW_MIPS_F20 = 52, 
-  UNW_MIPS_F21 = 53, 
-  UNW_MIPS_F22 = 54, 
-  UNW_MIPS_F23 = 55, 
-  UNW_MIPS_F24 = 56, 
-  UNW_MIPS_F25 = 57, 
-  UNW_MIPS_F26 = 58, 
-  UNW_MIPS_F27 = 59, 
-  UNW_MIPS_F28 = 60, 
-  UNW_MIPS_F29 = 61, 
-  UNW_MIPS_F30 = 62, 
-  UNW_MIPS_F31 = 63, 
-  UNW_MIPS_HI = 64, 
-  UNW_MIPS_LO = 65, 
-}; 
- 
-// SPARC registers 
-enum { 
-  UNW_SPARC_G0 = 0, 
-  UNW_SPARC_G1 = 1, 
-  UNW_SPARC_G2 = 2, 
-  UNW_SPARC_G3 = 3, 
-  UNW_SPARC_G4 = 4, 
-  UNW_SPARC_G5 = 5, 
-  UNW_SPARC_G6 = 6, 
-  UNW_SPARC_G7 = 7, 
-  UNW_SPARC_O0 = 8, 
-  UNW_SPARC_O1 = 9, 
-  UNW_SPARC_O2 = 10, 
-  UNW_SPARC_O3 = 11, 
-  UNW_SPARC_O4 = 12, 
-  UNW_SPARC_O5 = 13, 
-  UNW_SPARC_O6 = 14, 
-  UNW_SPARC_O7 = 15, 
-  UNW_SPARC_L0 = 16, 
-  UNW_SPARC_L1 = 17, 
-  UNW_SPARC_L2 = 18, 
-  UNW_SPARC_L3 = 19, 
-  UNW_SPARC_L4 = 20, 
-  UNW_SPARC_L5 = 21, 
-  UNW_SPARC_L6 = 22, 
-  UNW_SPARC_L7 = 23, 
-  UNW_SPARC_I0 = 24, 
-  UNW_SPARC_I1 = 25, 
-  UNW_SPARC_I2 = 26, 
-  UNW_SPARC_I3 = 27, 
-  UNW_SPARC_I4 = 28, 
-  UNW_SPARC_I5 = 29, 
-  UNW_SPARC_I6 = 30, 
-  UNW_SPARC_I7 = 31, 
-}; 
- 
-// Hexagon register numbers 
-enum { 
-  UNW_HEXAGON_R0, 
-  UNW_HEXAGON_R1, 
-  UNW_HEXAGON_R2, 
-  UNW_HEXAGON_R3, 
-  UNW_HEXAGON_R4, 
-  UNW_HEXAGON_R5, 
-  UNW_HEXAGON_R6, 
-  UNW_HEXAGON_R7, 
-  UNW_HEXAGON_R8, 
-  UNW_HEXAGON_R9, 
-  UNW_HEXAGON_R10, 
-  UNW_HEXAGON_R11, 
-  UNW_HEXAGON_R12, 
-  UNW_HEXAGON_R13, 
-  UNW_HEXAGON_R14, 
-  UNW_HEXAGON_R15, 
-  UNW_HEXAGON_R16, 
-  UNW_HEXAGON_R17, 
-  UNW_HEXAGON_R18, 
-  UNW_HEXAGON_R19, 
-  UNW_HEXAGON_R20, 
-  UNW_HEXAGON_R21, 
-  UNW_HEXAGON_R22, 
-  UNW_HEXAGON_R23, 
-  UNW_HEXAGON_R24, 
-  UNW_HEXAGON_R25, 
-  UNW_HEXAGON_R26, 
-  UNW_HEXAGON_R27, 
-  UNW_HEXAGON_R28, 
-  UNW_HEXAGON_R29, 
-  UNW_HEXAGON_R30, 
-  UNW_HEXAGON_R31, 
-  UNW_HEXAGON_P3_0, 
-  UNW_HEXAGON_PC, 
-}; 
- 
-// RISC-V registers. These match the DWARF register numbers defined by section 
-// 4 of the RISC-V ELF psABI specification, which can be found at: 
-// 
-// https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md 
-enum { 
-  UNW_RISCV_X0  = 0, 
-  UNW_RISCV_X1  = 1, 
-  UNW_RISCV_X2  = 2, 
-  UNW_RISCV_X3  = 3, 
-  UNW_RISCV_X4  = 4, 
-  UNW_RISCV_X5  = 5, 
-  UNW_RISCV_X6  = 6, 
-  UNW_RISCV_X7  = 7, 
-  UNW_RISCV_X8  = 8, 
-  UNW_RISCV_X9  = 9, 
-  UNW_RISCV_X10 = 10, 
-  UNW_RISCV_X11 = 11, 
-  UNW_RISCV_X12 = 12, 
-  UNW_RISCV_X13 = 13, 
-  UNW_RISCV_X14 = 14, 
-  UNW_RISCV_X15 = 15, 
-  UNW_RISCV_X16 = 16, 
-  UNW_RISCV_X17 = 17, 
-  UNW_RISCV_X18 = 18, 
-  UNW_RISCV_X19 = 19, 
-  UNW_RISCV_X20 = 20, 
-  UNW_RISCV_X21 = 21, 
-  UNW_RISCV_X22 = 22, 
-  UNW_RISCV_X23 = 23, 
-  UNW_RISCV_X24 = 24, 
-  UNW_RISCV_X25 = 25, 
-  UNW_RISCV_X26 = 26, 
-  UNW_RISCV_X27 = 27, 
-  UNW_RISCV_X28 = 28, 
-  UNW_RISCV_X29 = 29, 
-  UNW_RISCV_X30 = 30, 
-  UNW_RISCV_X31 = 31, 
-  UNW_RISCV_F0  = 32, 
-  UNW_RISCV_F1  = 33, 
-  UNW_RISCV_F2  = 34, 
-  UNW_RISCV_F3  = 35, 
-  UNW_RISCV_F4  = 36, 
-  UNW_RISCV_F5  = 37, 
-  UNW_RISCV_F6  = 38, 
-  UNW_RISCV_F7  = 39, 
-  UNW_RISCV_F8  = 40, 
-  UNW_RISCV_F9  = 41, 
-  UNW_RISCV_F10 = 42, 
-  UNW_RISCV_F11 = 43, 
-  UNW_RISCV_F12 = 44, 
-  UNW_RISCV_F13 = 45, 
-  UNW_RISCV_F14 = 46, 
-  UNW_RISCV_F15 = 47, 
-  UNW_RISCV_F16 = 48, 
-  UNW_RISCV_F17 = 49, 
-  UNW_RISCV_F18 = 50, 
-  UNW_RISCV_F19 = 51, 
-  UNW_RISCV_F20 = 52, 
-  UNW_RISCV_F21 = 53, 
-  UNW_RISCV_F22 = 54, 
-  UNW_RISCV_F23 = 55, 
-  UNW_RISCV_F24 = 56, 
-  UNW_RISCV_F25 = 57, 
-  UNW_RISCV_F26 = 58, 
-  UNW_RISCV_F27 = 59, 
-  UNW_RISCV_F28 = 60, 
-  UNW_RISCV_F29 = 61, 
-  UNW_RISCV_F30 = 62, 
-  UNW_RISCV_F31 = 63, 
-}; 
- 
 // VE register numbers
 enum {
   UNW_VE_S0   = 0,
diff --git a/contrib/libs/libunwind/include/mach-o/compact_unwind_encoding.h b/contrib/libs/libunwind/include/mach-o/compact_unwind_encoding.h
index b40514b4b1..68d562eec4 100644
--- a/contrib/libs/libunwind/include/mach-o/compact_unwind_encoding.h
+++ b/contrib/libs/libunwind/include/mach-o/compact_unwind_encoding.h
@@ -1,11 +1,11 @@
 //===----------------------------------------------------------------------===//
 //
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 
-// See https://llvm.org/LICENSE.txt for license information. 
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //
-// Darwin's alternative to DWARF based unwind encodings. 
+// Darwin's alternative to DWARF based unwind encodings.
 //
 //===----------------------------------------------------------------------===//
 
@@ -16,7 +16,7 @@
 #include <stdint.h>
 
 //
-// Compilers can emit standard DWARF FDEs in the __TEXT,__eh_frame section 
+// Compilers can emit standard DWARF FDEs in the __TEXT,__eh_frame section
 // of object files. Or compilers can emit compact unwind information in
 // the __LD,__compact_unwind section.
 //
@@ -25,10 +25,10 @@
 // runtime to access unwind info for any given function.  If the compiler
 // emitted compact unwind info for the function, that compact unwind info will
 // be encoded in the __TEXT,__unwind_info section. If the compiler emitted
-// DWARF unwind info, the __TEXT,__unwind_info section will contain the offset 
+// DWARF unwind info, the __TEXT,__unwind_info section will contain the offset
 // of the FDE in the __TEXT,__eh_frame section in the final linked image.
 //
-// Note: Previously, the linker would transform some DWARF unwind infos into 
+// Note: Previously, the linker would transform some DWARF unwind infos into
 //       compact unwind info.  But that is fragile and no longer done.
 
 
@@ -57,7 +57,7 @@ enum {
 // 1-bit: has lsda
 // 2-bit: personality index
 //
-// 4-bits: 0=old, 1=ebp based, 2=stack-imm, 3=stack-ind, 4=DWARF 
+// 4-bits: 0=old, 1=ebp based, 2=stack-imm, 3=stack-ind, 4=DWARF
 //  ebp based:
 //        15-bits (5*3-bits per reg) register permutation
 //        8-bits for stack offset
@@ -127,9 +127,9 @@ enum {
 //    UNWIND_X86_FRAMELESS_STACK_SIZE.  
 // UNWIND_X86_MODE_DWARF:
 //    No compact unwind encoding is available.  Instead the low 24-bits of the
-//    compact encoding is the offset of the DWARF FDE in the __eh_frame section. 
+//    compact encoding is the offset of the DWARF FDE in the __eh_frame section.
 //    This mode is never used in object files.  It is only generated by the 
-//    linker in final linked images which have only DWARF unwind info for a 
+//    linker in final linked images which have only DWARF unwind info for a
 //    function.
 //
 // The permutation encoding is a Lehmer code sequence encoded into a
@@ -192,7 +192,7 @@ enum {
 // 1-bit: has lsda
 // 2-bit: personality index
 //
-// 4-bits: 0=old, 1=rbp based, 2=stack-imm, 3=stack-ind, 4=DWARF 
+// 4-bits: 0=old, 1=rbp based, 2=stack-imm, 3=stack-ind, 4=DWARF
 //  rbp based:
 //        15-bits (5*3-bits per reg) register permutation
 //        8-bits for stack offset
@@ -261,9 +261,9 @@ enum {
 //    UNWIND_X86_64_FRAMELESS_STACK_SIZE.  
 // UNWIND_X86_64_MODE_DWARF:
 //    No compact unwind encoding is available.  Instead the low 24-bits of the
-//    compact encoding is the offset of the DWARF FDE in the __eh_frame section. 
+//    compact encoding is the offset of the DWARF FDE in the __eh_frame section.
 //    This mode is never used in object files.  It is only generated by the 
-//    linker in final linked images which have only DWARF unwind info for a 
+//    linker in final linked images which have only DWARF unwind info for a
 //    function.
 //
 
@@ -274,14 +274,14 @@ enum {
 // 1-bit: has lsda
 // 2-bit: personality index
 //
-// 4-bits: 4=frame-based, 3=DWARF, 2=frameless 
+// 4-bits: 4=frame-based, 3=DWARF, 2=frameless
 //  frameless:
 //        12-bits of stack size
 //  frame-based:
 //        4-bits D reg pairs saved
 //        5-bits X reg pairs saved
-//  DWARF: 
-//        24-bits offset of DWARF FDE in __eh_frame section 
+//  DWARF:
+//        24-bits offset of DWARF FDE in __eh_frame section
 //
 enum {
     UNWIND_ARM64_MODE_MASK                     = 0x0F000000,
@@ -319,9 +319,9 @@ enum {
 //    UNWIND_ARM64_FRAMELESS_STACK_SIZE_MASK.
 // UNWIND_ARM64_MODE_DWARF:
 //    No compact unwind encoding is available.  Instead the low 24-bits of the
-//    compact encoding is the offset of the DWARF FDE in the __eh_frame section. 
+//    compact encoding is the offset of the DWARF FDE in the __eh_frame section.
 //    This mode is never used in object files.  It is only generated by the 
-//    linker in final linked images which have only DWARF unwind info for a 
+//    linker in final linked images which have only DWARF unwind info for a
 //    function.
 //
 
@@ -384,7 +384,7 @@ enum {
 // saved at that range of the function.
 //
 // If a particular function is so wacky that there is no compact unwind way
-// to encode it, then the compiler can emit traditional DWARF unwind info.   
+// to encode it, then the compiler can emit traditional DWARF unwind info.  
 // The runtime will use which ever is available.
 //
 // Runtime support for compact unwind encodings are only available on 10.6 
diff --git a/contrib/libs/libunwind/include/unwind.h b/contrib/libs/libunwind/include/unwind.h
index b5d04b25b5..6949e063dd 100644
--- a/contrib/libs/libunwind/include/unwind.h
+++ b/contrib/libs/libunwind/include/unwind.h
@@ -1,12 +1,12 @@
 //===----------------------------------------------------------------------===//
 //
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 
-// See https://llvm.org/LICENSE.txt for license information. 
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //
 // C++ ABI Level 1 ABI documented at:
-//   https://itanium-cxx-abi.github.io/cxx-abi/abi-eh.html 
+//   https://itanium-cxx-abi.github.io/cxx-abi/abi-eh.html
 //
 //===----------------------------------------------------------------------===//
 
@@ -18,11 +18,11 @@
 #include <stdint.h>
 #include <stddef.h>
 
-#if defined(__SEH__) && !defined(__USING_SJLJ_EXCEPTIONS__) && defined(_WIN32) 
-#include <windows.h> 
-#include <ntverp.h> 
-#endif 
- 
+#if defined(__SEH__) && !defined(__USING_SJLJ_EXCEPTIONS__) && defined(_WIN32)
+#include <windows.h>
+#include <ntverp.h>
+#endif
+
 #if defined(__APPLE__)
 #define LIBUNWIND_UNAVAIL __attribute__ (( deprecated ))
 #else
@@ -40,7 +40,7 @@ typedef enum {
   _URC_HANDLER_FOUND = 6,
   _URC_INSTALL_CONTEXT = 7,
   _URC_CONTINUE_UNWIND = 8,
-#if defined(_LIBUNWIND_ARM_EHABI) 
+#if defined(_LIBUNWIND_ARM_EHABI)
   _URC_FAILURE = 9
 #endif
 } _Unwind_Reason_Code;
@@ -55,11 +55,11 @@ typedef enum {
 
 typedef struct _Unwind_Context _Unwind_Context;   // opaque
 
-#if defined(_LIBUNWIND_ARM_EHABI) 
+#if defined(_LIBUNWIND_ARM_EHABI)
 #include "unwind_arm_ehabi.h"
-#else 
+#else
 #include "unwind_itanium.h"
-#endif 
+#endif
 
 typedef _Unwind_Reason_Code (*_Unwind_Stop_Fn)
     (int version,
@@ -141,7 +141,7 @@ extern void __deregister_frame(const void *fde);
 
 // _Unwind_Find_FDE() will locate the FDE if the pc is in some function that has
 // an associated FDE. Note, Mac OS X 10.6 and later, introduces "compact unwind
-// info" which the runtime uses in preference to DWARF unwind info.  This 
+// info" which the runtime uses in preference to DWARF unwind info.  This
 // function will only work if the target function has an FDE but no compact
 // unwind info.
 struct dwarf_eh_bases {
@@ -154,7 +154,7 @@ extern const void *_Unwind_Find_FDE(const void *pc, struct dwarf_eh_bases *);
 
 // This function attempts to find the start (address of first instruction) of
 // a function given an address inside the function.  It only works if the
-// function has an FDE (DWARF unwind info). 
+// function has an FDE (DWARF unwind info).
 // This function is unimplemented on Mac OS X 10.6 and later.  Instead, use
 // _Unwind_Find_FDE() and look at the dwarf_eh_bases.func result.
 extern void *_Unwind_FindEnclosingFunction(void *pc);
@@ -185,21 +185,21 @@ extern void *__deregister_frame_info(const void *fde)
 extern void *__deregister_frame_info_bases(const void *fde)
     LIBUNWIND_UNAVAIL;
 
-#if defined(__SEH__) && !defined(__USING_SJLJ_EXCEPTIONS__) 
-#ifndef _WIN32 
-typedef struct _EXCEPTION_RECORD EXCEPTION_RECORD; 
-typedef struct _CONTEXT CONTEXT; 
-typedef struct _DISPATCHER_CONTEXT DISPATCHER_CONTEXT; 
-#elif !defined(__MINGW32__) && VER_PRODUCTBUILD < 8000 
-typedef struct _DISPATCHER_CONTEXT DISPATCHER_CONTEXT; 
-#endif 
-// This is the common wrapper for GCC-style personality functions with SEH. 
-extern EXCEPTION_DISPOSITION _GCC_specific_handler(EXCEPTION_RECORD *exc, 
-                                                   void *frame, CONTEXT *ctx, 
-                                                   DISPATCHER_CONTEXT *disp, 
-                                                   _Unwind_Personality_Fn pers); 
-#endif 
- 
+#if defined(__SEH__) && !defined(__USING_SJLJ_EXCEPTIONS__)
+#ifndef _WIN32
+typedef struct _EXCEPTION_RECORD EXCEPTION_RECORD;
+typedef struct _CONTEXT CONTEXT;
+typedef struct _DISPATCHER_CONTEXT DISPATCHER_CONTEXT;
+#elif !defined(__MINGW32__) && VER_PRODUCTBUILD < 8000
+typedef struct _DISPATCHER_CONTEXT DISPATCHER_CONTEXT;
+#endif
+// This is the common wrapper for GCC-style personality functions with SEH.
+extern EXCEPTION_DISPOSITION _GCC_specific_handler(EXCEPTION_RECORD *exc,
+                                                   void *frame, CONTEXT *ctx,
+                                                   DISPATCHER_CONTEXT *disp,
+                                                   _Unwind_Personality_Fn pers);
+#endif
+
 #ifdef _YNDX_LIBUNWIND_ENABLE_EXCEPTION_BACKTRACE
 
 #define _YNDX_LIBUNWIND_EXCEPTION_BACKTRACE_SIZE 128
diff --git a/contrib/libs/libunwind/include/unwind_arm_ehabi.h b/contrib/libs/libunwind/include/unwind_arm_ehabi.h
index 06740d68ee..6277a1457f 100644
--- a/contrib/libs/libunwind/include/unwind_arm_ehabi.h
+++ b/contrib/libs/libunwind/include/unwind_arm_ehabi.h
@@ -1,8 +1,8 @@
 //===----------------------------------------------------------------------===//
 //
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 
-// See https://llvm.org/LICENSE.txt for license information. 
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //
 // C++ ABI Level 1 ABI documented at:
@@ -18,7 +18,7 @@ typedef uint32_t _Unwind_State;
 static const _Unwind_State _US_VIRTUAL_UNWIND_FRAME   = 0;
 static const _Unwind_State _US_UNWIND_FRAME_STARTING  = 1;
 static const _Unwind_State _US_UNWIND_FRAME_RESUME    = 2;
-static const _Unwind_State _US_ACTION_MASK            = 3; 
+static const _Unwind_State _US_ACTION_MASK            = 3;
 /* Undocumented flag for force unwinding. */
 static const _Unwind_State _US_FORCE_UNWIND           = 8;
 
@@ -62,11 +62,11 @@ struct _Unwind_Control_Block {
   } pr_cache;
 
   long long int :0; /* Enforce the 8-byte alignment */
-} __attribute__((__aligned__(8))); 
+} __attribute__((__aligned__(8)));
 
-typedef _Unwind_Reason_Code (*_Unwind_Personality_Fn)( 
-    _Unwind_State state, _Unwind_Exception *exceptionObject, 
-    struct _Unwind_Context *context); 
+typedef _Unwind_Reason_Code (*_Unwind_Personality_Fn)(
+    _Unwind_State state, _Unwind_Exception *exceptionObject,
+    struct _Unwind_Context *context);
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/contrib/libs/libunwind/include/unwind_itanium.h b/contrib/libs/libunwind/include/unwind_itanium.h
index 460772df57..d94a6183be 100644
--- a/contrib/libs/libunwind/include/unwind_itanium.h
+++ b/contrib/libs/libunwind/include/unwind_itanium.h
@@ -1,12 +1,12 @@
 //===----------------------------------------------------------------------===//
 //
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 
-// See https://llvm.org/LICENSE.txt for license information. 
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //
 // C++ ABI Level 1 ABI documented at:
-//   https://itanium-cxx-abi.github.io/cxx-abi/abi-eh.html 
+//   https://itanium-cxx-abi.github.io/cxx-abi/abi-eh.html
 //
 //===----------------------------------------------------------------------===//
 
@@ -22,27 +22,27 @@ struct _Unwind_Exception {
   _Unwind_Exception_Class exception_class;
   void (*exception_cleanup)(_Unwind_Reason_Code reason,
                             _Unwind_Exception *exc);
-#if defined(__SEH__) && !defined(__USING_SJLJ_EXCEPTIONS__) 
-  uintptr_t private_[6]; 
-#else 
+#if defined(__SEH__) && !defined(__USING_SJLJ_EXCEPTIONS__)
+  uintptr_t private_[6];
+#else
   uintptr_t private_1; // non-zero means forced unwind
   uintptr_t private_2; // holds sp that phase1 found for phase2 to use
-#endif 
-#if __SIZEOF_POINTER__ == 4 
-  // The implementation of _Unwind_Exception uses an attribute mode on the 
-  // above fields which has the side effect of causing this whole struct to 
-  // round up to 32 bytes in size (48 with SEH). To be more explicit, we add 
-  // pad fields added for binary compatibility. 
+#endif
+#if __SIZEOF_POINTER__ == 4
+  // The implementation of _Unwind_Exception uses an attribute mode on the
+  // above fields which has the side effect of causing this whole struct to
+  // round up to 32 bytes in size (48 with SEH). To be more explicit, we add
+  // pad fields added for binary compatibility.
   uint32_t reserved[3];
 #endif
-  // The Itanium ABI requires that _Unwind_Exception objects are "double-word 
-  // aligned".  GCC has interpreted this to mean "use the maximum useful 
-  // alignment for the target"; so do we. 
-} __attribute__((__aligned__)); 
+  // The Itanium ABI requires that _Unwind_Exception objects are "double-word
+  // aligned".  GCC has interpreted this to mean "use the maximum useful
+  // alignment for the target"; so do we.
+} __attribute__((__aligned__));
 
-typedef _Unwind_Reason_Code (*_Unwind_Personality_Fn)( 
-    int version, _Unwind_Action actions, uint64_t exceptionClass, 
-    _Unwind_Exception *exceptionObject, struct _Unwind_Context *context); 
+typedef _Unwind_Reason_Code (*_Unwind_Personality_Fn)(
+    int version, _Unwind_Action actions, uint64_t exceptionClass,
+    _Unwind_Exception *exceptionObject, struct _Unwind_Context *context);
 
 #ifdef __cplusplus
 extern "C" {