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authorvskipin <vskipin@yandex-team.ru>2022-02-10 16:46:00 +0300
committerDaniil Cherednik <dcherednik@yandex-team.ru>2022-02-10 16:46:00 +0300
commit4d8b546b89b5afc08cf3667e176271c7ba935f33 (patch)
tree1a2c5ffcf89eb53ecd79dbc9bc0a195c27404d0c /contrib/libs/libaio/syscall-s390.h
parent4e4b78bd7b67e2533da4dbb9696374a6d6068e32 (diff)
downloadydb-4d8b546b89b5afc08cf3667e176271c7ba935f33.tar.gz
Restoring authorship annotation for <vskipin@yandex-team.ru>. Commit 2 of 2.
Diffstat (limited to 'contrib/libs/libaio/syscall-s390.h')
-rw-r--r--contrib/libs/libaio/syscall-s390.h262
1 files changed, 131 insertions, 131 deletions
diff --git a/contrib/libs/libaio/syscall-s390.h b/contrib/libs/libaio/syscall-s390.h
index f595810dda..3ec5ee34ee 100644
--- a/contrib/libs/libaio/syscall-s390.h
+++ b/contrib/libs/libaio/syscall-s390.h
@@ -1,131 +1,131 @@
-#define __NR_io_setup 243
-#define __NR_io_destroy 244
-#define __NR_io_getevents 245
-#define __NR_io_submit 246
-#define __NR_io_cancel 247
-
-#define io_svc_clobber "1", "cc", "memory"
-
-#define io_syscall1(type,fname,sname,type1,arg1) \
-type fname(type1 arg1) { \
- register type1 __arg1 asm("2") = arg1; \
- register long __svcres asm("2"); \
- long __res; \
- __asm__ __volatile__ ( \
- " .if %1 < 256\n" \
- " svc %b1\n" \
- " .else\n" \
- " la %%r1,%1\n" \
- " .svc 0\n" \
- " .endif" \
- : "=d" (__svcres) \
- : "i" (__NR_##sname), \
- "0" (__arg1) \
- : io_svc_clobber ); \
- __res = __svcres; \
- return (type) __res; \
-}
-
-#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
-type fname(type1 arg1, type2 arg2) { \
- register type1 __arg1 asm("2") = arg1; \
- register type2 __arg2 asm("3") = arg2; \
- register long __svcres asm("2"); \
- long __res; \
- __asm__ __volatile__ ( \
- " .if %1 < 256\n" \
- " svc %b1\n" \
- " .else\n" \
- " la %%r1,%1\n" \
- " svc 0\n" \
- " .endif" \
- : "=d" (__svcres) \
- : "i" (__NR_##sname), \
- "0" (__arg1), \
- "d" (__arg2) \
- : io_svc_clobber ); \
- __res = __svcres; \
- return (type) __res; \
-}
-
-#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2, \
- type3,arg3) \
-type fname(type1 arg1, type2 arg2, type3 arg3) { \
- register type1 __arg1 asm("2") = arg1; \
- register type2 __arg2 asm("3") = arg2; \
- register type3 __arg3 asm("4") = arg3; \
- register long __svcres asm("2"); \
- long __res; \
- __asm__ __volatile__ ( \
- " .if %1 < 256\n" \
- " svc %b1\n" \
- " .else\n" \
- " la %%r1,%1\n" \
- " svc 0\n" \
- " .endif" \
- : "=d" (__svcres) \
- : "i" (__NR_##sname), \
- "0" (__arg1), \
- "d" (__arg2), \
- "d" (__arg3) \
- : io_svc_clobber ); \
- __res = __svcres; \
- return (type) __res; \
-}
-
-#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2, \
- type3,arg3,type4,arg4) \
-type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
- register type1 __arg1 asm("2") = arg1; \
- register type2 __arg2 asm("3") = arg2; \
- register type3 __arg3 asm("4") = arg3; \
- register type4 __arg4 asm("5") = arg4; \
- register long __svcres asm("2"); \
- long __res; \
- __asm__ __volatile__ ( \
- " .if %1 < 256\n" \
- " svc %b1\n" \
- " .else\n" \
- " la %%r1,%1\n" \
- " svc 0\n" \
- " .endif" \
- : "=d" (__svcres) \
- : "i" (__NR_##sname), \
- "0" (__arg1), \
- "d" (__arg2), \
- "d" (__arg3), \
- "d" (__arg4) \
- : io_svc_clobber ); \
- __res = __svcres; \
- return (type) __res; \
-}
-
-#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2, \
- type3,arg3,type4,arg4,type5,arg5) \
-type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, \
- type5 arg5) { \
- register type1 __arg1 asm("2") = arg1; \
- register type2 __arg2 asm("3") = arg2; \
- register type3 __arg3 asm("4") = arg3; \
- register type4 __arg4 asm("5") = arg4; \
- register type5 __arg5 asm("6") = arg5; \
- register long __svcres asm("2"); \
- long __res; \
- __asm__ __volatile__ ( \
- " .if %1 < 256\n" \
- " svc %b1\n" \
- " .else\n" \
- " la %%r1,%1\n" \
- " svc 0\n" \
- " .endif" \
- : "=d" (__svcres) \
- : "i" (__NR_##sname), \
- "0" (__arg1), \
- "d" (__arg2), \
- "d" (__arg3), \
- "d" (__arg4), \
- "d" (__arg5) \
- : io_svc_clobber ); \
- __res = __svcres; \
- return (type) __res; \
-}
+#define __NR_io_setup 243
+#define __NR_io_destroy 244
+#define __NR_io_getevents 245
+#define __NR_io_submit 246
+#define __NR_io_cancel 247
+
+#define io_svc_clobber "1", "cc", "memory"
+
+#define io_syscall1(type,fname,sname,type1,arg1) \
+type fname(type1 arg1) { \
+ register type1 __arg1 asm("2") = arg1; \
+ register long __svcres asm("2"); \
+ long __res; \
+ __asm__ __volatile__ ( \
+ " .if %1 < 256\n" \
+ " svc %b1\n" \
+ " .else\n" \
+ " la %%r1,%1\n" \
+ " .svc 0\n" \
+ " .endif" \
+ : "=d" (__svcres) \
+ : "i" (__NR_##sname), \
+ "0" (__arg1) \
+ : io_svc_clobber ); \
+ __res = __svcres; \
+ return (type) __res; \
+}
+
+#define io_syscall2(type,fname,sname,type1,arg1,type2,arg2) \
+type fname(type1 arg1, type2 arg2) { \
+ register type1 __arg1 asm("2") = arg1; \
+ register type2 __arg2 asm("3") = arg2; \
+ register long __svcres asm("2"); \
+ long __res; \
+ __asm__ __volatile__ ( \
+ " .if %1 < 256\n" \
+ " svc %b1\n" \
+ " .else\n" \
+ " la %%r1,%1\n" \
+ " svc 0\n" \
+ " .endif" \
+ : "=d" (__svcres) \
+ : "i" (__NR_##sname), \
+ "0" (__arg1), \
+ "d" (__arg2) \
+ : io_svc_clobber ); \
+ __res = __svcres; \
+ return (type) __res; \
+}
+
+#define io_syscall3(type,fname,sname,type1,arg1,type2,arg2, \
+ type3,arg3) \
+type fname(type1 arg1, type2 arg2, type3 arg3) { \
+ register type1 __arg1 asm("2") = arg1; \
+ register type2 __arg2 asm("3") = arg2; \
+ register type3 __arg3 asm("4") = arg3; \
+ register long __svcres asm("2"); \
+ long __res; \
+ __asm__ __volatile__ ( \
+ " .if %1 < 256\n" \
+ " svc %b1\n" \
+ " .else\n" \
+ " la %%r1,%1\n" \
+ " svc 0\n" \
+ " .endif" \
+ : "=d" (__svcres) \
+ : "i" (__NR_##sname), \
+ "0" (__arg1), \
+ "d" (__arg2), \
+ "d" (__arg3) \
+ : io_svc_clobber ); \
+ __res = __svcres; \
+ return (type) __res; \
+}
+
+#define io_syscall4(type,fname,sname,type1,arg1,type2,arg2, \
+ type3,arg3,type4,arg4) \
+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4) { \
+ register type1 __arg1 asm("2") = arg1; \
+ register type2 __arg2 asm("3") = arg2; \
+ register type3 __arg3 asm("4") = arg3; \
+ register type4 __arg4 asm("5") = arg4; \
+ register long __svcres asm("2"); \
+ long __res; \
+ __asm__ __volatile__ ( \
+ " .if %1 < 256\n" \
+ " svc %b1\n" \
+ " .else\n" \
+ " la %%r1,%1\n" \
+ " svc 0\n" \
+ " .endif" \
+ : "=d" (__svcres) \
+ : "i" (__NR_##sname), \
+ "0" (__arg1), \
+ "d" (__arg2), \
+ "d" (__arg3), \
+ "d" (__arg4) \
+ : io_svc_clobber ); \
+ __res = __svcres; \
+ return (type) __res; \
+}
+
+#define io_syscall5(type,fname,sname,type1,arg1,type2,arg2, \
+ type3,arg3,type4,arg4,type5,arg5) \
+type fname(type1 arg1, type2 arg2, type3 arg3, type4 arg4, \
+ type5 arg5) { \
+ register type1 __arg1 asm("2") = arg1; \
+ register type2 __arg2 asm("3") = arg2; \
+ register type3 __arg3 asm("4") = arg3; \
+ register type4 __arg4 asm("5") = arg4; \
+ register type5 __arg5 asm("6") = arg5; \
+ register long __svcres asm("2"); \
+ long __res; \
+ __asm__ __volatile__ ( \
+ " .if %1 < 256\n" \
+ " svc %b1\n" \
+ " .else\n" \
+ " la %%r1,%1\n" \
+ " svc 0\n" \
+ " .endif" \
+ : "=d" (__svcres) \
+ : "i" (__NR_##sname), \
+ "0" (__arg1), \
+ "d" (__arg2), \
+ "d" (__arg3), \
+ "d" (__arg4), \
+ "d" (__arg5) \
+ : io_svc_clobber ); \
+ __res = __svcres; \
+ return (type) __res; \
+}
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