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| author | danlark <danlark@yandex-team.ru> | 2022-02-10 16:46:08 +0300 |
|---|---|---|
| committer | Daniil Cherednik <dcherednik@yandex-team.ru> | 2022-02-10 16:46:08 +0300 |
| commit | 3426a9bc7f169ae9da54cef557ad2a33f6e8eee0 (patch) | |
| tree | 26154e1e9990f1bb4525d3e3fb5b6dac2c2c1da2 /contrib/libs/libaio/syscall-alpha.h | |
| parent | cb68f224c46a8ee52ac3fdd2a32534b8bb8dc134 (diff) | |
| download | ydb-3426a9bc7f169ae9da54cef557ad2a33f6e8eee0.tar.gz | |
Restoring authorship annotation for <danlark@yandex-team.ru>. Commit 1 of 2.
Diffstat (limited to 'contrib/libs/libaio/syscall-alpha.h')
| -rw-r--r-- | contrib/libs/libaio/syscall-alpha.h | 64 |
1 files changed, 32 insertions, 32 deletions
diff --git a/contrib/libs/libaio/syscall-alpha.h b/contrib/libs/libaio/syscall-alpha.h index 467b74f07e..80e792f5c8 100644 --- a/contrib/libs/libaio/syscall-alpha.h +++ b/contrib/libs/libaio/syscall-alpha.h @@ -13,8 +13,8 @@ #define inline_syscall0(name, args...) \ { \ - register long _sc_0 inline_syscall_r0_asm; \ - register long _sc_19 __asm__("$19"); \ + register long _sc_0 inline_syscall_r0_asm; \ + register long _sc_19 __asm__("$19"); \ \ _sc_0 = name; \ __asm__ __volatile__ \ @@ -29,9 +29,9 @@ #define inline_syscall1(name,arg1) \ { \ - register long _sc_0 inline_syscall_r0_asm; \ - register long _sc_16 __asm__("$16"); \ - register long _sc_19 __asm__("$19"); \ + register long _sc_0 inline_syscall_r0_asm; \ + register long _sc_16 __asm__("$16"); \ + register long _sc_19 __asm__("$19"); \ \ _sc_0 = name; \ _sc_16 = (long) (arg1); \ @@ -47,10 +47,10 @@ #define inline_syscall2(name,arg1,arg2) \ { \ - register long _sc_0 inline_syscall_r0_asm; \ - register long _sc_16 __asm__("$16"); \ - register long _sc_17 __asm__("$17"); \ - register long _sc_19 __asm__("$19"); \ + register long _sc_0 inline_syscall_r0_asm; \ + register long _sc_16 __asm__("$16"); \ + register long _sc_17 __asm__("$17"); \ + register long _sc_19 __asm__("$19"); \ \ _sc_0 = name; \ _sc_16 = (long) (arg1); \ @@ -67,11 +67,11 @@ #define inline_syscall3(name,arg1,arg2,arg3) \ { \ - register long _sc_0 inline_syscall_r0_asm; \ - register long _sc_16 __asm__("$16"); \ - register long _sc_17 __asm__("$17"); \ - register long _sc_18 __asm__("$18"); \ - register long _sc_19 __asm__("$19"); \ + register long _sc_0 inline_syscall_r0_asm; \ + register long _sc_16 __asm__("$16"); \ + register long _sc_17 __asm__("$17"); \ + register long _sc_18 __asm__("$18"); \ + register long _sc_19 __asm__("$19"); \ \ _sc_0 = name; \ _sc_16 = (long) (arg1); \ @@ -90,11 +90,11 @@ #define inline_syscall4(name,arg1,arg2,arg3,arg4) \ { \ - register long _sc_0 inline_syscall_r0_asm; \ - register long _sc_16 __asm__("$16"); \ - register long _sc_17 __asm__("$17"); \ - register long _sc_18 __asm__("$18"); \ - register long _sc_19 __asm__("$19"); \ + register long _sc_0 inline_syscall_r0_asm; \ + register long _sc_16 __asm__("$16"); \ + register long _sc_17 __asm__("$17"); \ + register long _sc_18 __asm__("$18"); \ + register long _sc_19 __asm__("$19"); \ \ _sc_0 = name; \ _sc_16 = (long) (arg1); \ @@ -114,12 +114,12 @@ #define inline_syscall5(name,arg1,arg2,arg3,arg4,arg5) \ { \ - register long _sc_0 inline_syscall_r0_asm; \ - register long _sc_16 __asm__("$16"); \ - register long _sc_17 __asm__("$17"); \ - register long _sc_18 __asm__("$18"); \ - register long _sc_19 __asm__("$19"); \ - register long _sc_20 __asm__("$20"); \ + register long _sc_0 inline_syscall_r0_asm; \ + register long _sc_16 __asm__("$16"); \ + register long _sc_17 __asm__("$17"); \ + register long _sc_18 __asm__("$18"); \ + register long _sc_19 __asm__("$19"); \ + register long _sc_20 __asm__("$20"); \ \ _sc_0 = name; \ _sc_16 = (long) (arg1); \ @@ -140,13 +140,13 @@ #define inline_syscall6(name,arg1,arg2,arg3,arg4,arg5,arg6) \ { \ - register long _sc_0 inline_syscall_r0_asm; \ - register long _sc_16 __asm__("$16"); \ - register long _sc_17 __asm__("$17"); \ - register long _sc_18 __asm__("$18"); \ - register long _sc_19 __asm__("$19"); \ - register long _sc_20 __asm__("$20"); \ - register long _sc_21 __asm__("$21"); \ + register long _sc_0 inline_syscall_r0_asm; \ + register long _sc_16 __asm__("$16"); \ + register long _sc_17 __asm__("$17"); \ + register long _sc_18 __asm__("$18"); \ + register long _sc_19 __asm__("$19"); \ + register long _sc_20 __asm__("$20"); \ + register long _sc_21 __asm__("$21"); \ \ _sc_0 = name; \ _sc_16 = (long) (arg1); \ |