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<title>ydb/build/plugins/cuda.py, branch main</title>
<subtitle>Mirror of YDB github repos</subtitle>
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<updated>2026-03-26T00:07:48Z</updated>
<entry>
<title>[build] cuda: Fix CUB with CUDA_SRCS()</title>
<updated>2026-03-26T00:07:48Z</updated>
<author>
<name>deshevoy</name>
<email>deshevoy@yandex-team.com</email>
</author>
<published>2026-03-25T21:19:53Z</published>
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<id>urn:sha1:ff7835403a6a43d352a94c8e9bfa8a7fdc18901a</id>
<content type='text'>
Specify `__CUDA_ARCH_LIST__` explicitly so CUB namespace stay the same across all nvcc invokations
commit_hash:2100ccb2307100378bcead498fd34cd11e44c566
</content>
</entry>
<entry>
<title>[build] cuda: Disable some warnings when compiling host code</title>
<updated>2026-02-09T00:18:52Z</updated>
<author>
<name>deshevoy</name>
<email>deshevoy@yandex-team.com</email>
</author>
<published>2026-02-08T23:49:52Z</published>
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<id>urn:sha1:97138ada9b70305854bcd48c9a2fbe500df0b014</id>
<content type='text'>
nvcc disables them implicitly

ISSUE:
commit_hash:0b68decce1f030902bd770b8b98fc8102c97e738
</content>
</entry>
<entry>
<title>[build] cuda: Add .module_id sanity check to CUDA_SRCS</title>
<updated>2026-02-02T17:54:05Z</updated>
<author>
<name>deshevoy</name>
<email>deshevoy@yandex-team.com</email>
</author>
<published>2026-02-02T17:17:29Z</published>
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<id>urn:sha1:527205698ee1e45c26021bea3ea3a94b9bfaca5e</id>
<content type='text'>
IDs generated by different cicc invocations should match

ISSUE:
commit_hash:7cd593cee44b31875e7166709d7614dcfa3f1f14
</content>
</entry>
<entry>
<title>[build] cuda: Fix CUDA_SRCS to support architecture- and family-specific features</title>
<updated>2026-02-02T17:48:27Z</updated>
<author>
<name>deshevoy</name>
<email>deshevoy@yandex-team.com</email>
</author>
<published>2026-02-02T17:12:30Z</published>
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<id>urn:sha1:5c6eeb9bcf8adb1fabac60bcc83e359580210446</id>
<content type='text'>
E.g. sm_90a or sm_100f

ISSUE:
commit_hash:250df064a8abcac925db676565582b5ef05401bb
</content>
</entry>
<entry>
<title>[build] cuda: Fix</title>
<updated>2026-02-01T19:47:50Z</updated>
<author>
<name>deshevoy</name>
<email>deshevoy@yandex-team.com</email>
</author>
<published>2026-02-01T19:21:16Z</published>
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<id>urn:sha1:b2d18406dc63ac0d0bfbfa6cd9c0589174f3b58e</id>
<content type='text'>
commit_hash:f73df3ec27f0695b21e7047ee465b15b201ea06b
</content>
</entry>
<entry>
<title>[build] cuda: Introduce CUDA_SRCS macro utilizing parallelized device code compilation</title>
<updated>2026-02-01T17:51:53Z</updated>
<author>
<name>deshevoy</name>
<email>deshevoy@yandex-team.com</email>
</author>
<published>2026-02-01T17:25:47Z</published>
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<id>urn:sha1:2726a4c04b0e9ddc111f2d1ea56390624cb67228</id>
<content type='text'>
Instead of a single graph node launching NVCC to compile .cu for both host and all device architectures
CUDA_SRCS generates multiple nodes:
- node per each device architecture producing PTX and CUBIN
- node merging all PTX and CUBIN files into a single FATBIN blob
- node producing .cpp with host code
- node compiling host .cpp with embedded FATBIN blob

CUDA_ARCHITECTURES variable is used to determine the list of architectures to compile device code for.

ISSUE:
commit_hash:0a4c2797dd238ae062482af30694df6978301278
</content>
</entry>
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