SVGA - init from VXD

16 files changed, 301 insertions, 132 deletions

diff --git a/control_vxd.c b/control_vxd.c
index 04852ec..2c432ea 100644
--- a/control_vxd.c
+++ b/control_vxd.c
@@ -255,3 +255,44 @@ void CB_stop()
 		}

 	}

 }

+

+void VXD_get_addr(DWORD __far *lpLinFB, DWORD __far *lpLinFifo, DWORD __far *lpLinFifoBounce)

+{

+	static DWORD linFB = 0;

+	static DWORD linFifo = 0;

+	static DWORD linFifoBounce = 0;

+	

+	if(VXD_srv != 0)

+	{

+		_asm

+		{

+			.386

+			push eax

+			push edx

+			

+			push ecx

+			push esi

+			push edi

+			

+		  mov edx, VMWSVXD_PM16_GET_ADDR

+		  call dword ptr [VXD_srv]

+			

+			mov [linFB], ecx

+			mov [linFifo], edi

+			mov [linFifoBounce], esi

+			

+			pop edi

+			pop esi

+			pop ecx

+			

+			pop edx

+			pop eax

+		}

+	}

+	

+	*lpLinFB = linFB;

+	*lpLinFifo = linFifo;

+	*lpLinFifoBounce = linFifoBounce;

+}

+

+

diff --git a/control_vxd.h b/control_vxd.h
index 53f446b..c65e0eb 100644
--- a/control_vxd.h
+++ b/control_vxd.h
@@ -8,5 +8,6 @@ void VXD_zeromem(DWORD LAddr, DWORD size);
 DWORD VXD_apiver();

 void CB_start();

 void CB_stop();

+void VXD_get_addr(DWORD __far *lpLinFB, DWORD __far *lpLinFifo, DWORD __far *lpLinFifoBounce);

 

 #endif

diff --git a/dbgprint.c b/dbgprint.c
index e72ab30..f8a9640 100644
--- a/dbgprint.c
+++ b/dbgprint.c
@@ -276,6 +276,11 @@ void dbg_printf( const char *s, ... )
 #endif

                 } else if( conv == 'x' || conv == 'X' ) {

                     hexa = conv - 'X' + 'A';

+#ifdef VXD32

+                    if( !width )

+                        width = 8;

+                    prt_hex32( dword, width, hexa );

+#else

                     if( type_len == 'l' ) {

                         if( !width )

                             width = 8;

@@ -285,6 +290,7 @@ void dbg_printf( const char *s, ... )
                             width = 4;

                         prt_hex32( word, width, hexa );

                     }

+#endif

                 }

             } else {

                 /* Just print whatever is there. */

diff --git a/io.h b/io.h
index 2f28520..a2fa32e 100644
--- a/io.h
+++ b/io.h
@@ -50,7 +50,7 @@ void outpd_asm( unsigned port, unsigned long val );
     "mov    ax, bx"     \
     "out    dx, eax"    \
     "pop    eax"        \
-    parm [dx] [bx ax] nomemory;
+    parm [dx] [bx ax] modify [bx] nomemory;
 
 #ifdef NEEDVIDEO
 
diff --git a/minivdd_qemu.c b/minivdd_qemu.c
index cc51e73..2a30644 100644
--- a/minivdd_qemu.c
+++ b/minivdd_qemu.c
@@ -1,2 +1,3 @@
+#define VXD32

 #define QEMU

 #include "minivdd.c"

diff --git a/minivdd_svga.c b/minivdd_svga.c
index 54b99a4..25ebaac 100644
--- a/minivdd_svga.c
+++ b/minivdd_svga.c
@@ -1,2 +1,3 @@
+#define VXD32

 #define SVGA

 #include "minivdd.c"

diff --git a/modes.c b/modes.c
index fd56fbf..965a225 100644
--- a/modes.c
+++ b/modes.c
@@ -75,7 +75,9 @@ DWORD FBHDA_linear = 0;
        DWORD    dwScreenFlatAddr = 0;   /* 32-bit flat address of VRAM. */

        DWORD    dwVideoMemorySize = 0;  /* Installed VRAM in bytes. */

 static WORD     wScreenPitchBytes = 0;  /* Current scanline pitch. */

+#ifndef SVGA

 static DWORD    dwPhysVRAM = 0;         /* Physical LFB base address. */

+#endif

 

 /* These are currently calculated not needed in the absence of

  * offscreen video memory.

@@ -275,6 +277,7 @@ static void ClearVisibleScreen( void )
 #endif

 }

 

+#ifndef SVGA

 /* Map physical memory to memory space, lpLinAddress is option pointer to store

  * mapped linear address

  */

@@ -301,6 +304,7 @@ static DWORD AllocLinearSelector(DWORD dwPhysAddr, DWORD dwSize, DWORD __far * l
 

     return( wSel );

 }

+#endif

 

 #ifdef SVGA

 /*

@@ -420,7 +424,8 @@ extern void __loadds SVGA_UpdateRect(LONG x, LONG y, LONG w, LONG h)
 static int __loadds SVGA_full_init()

 {

   int rc = 0;

-  DWORD fifosel = 0; 

+  DWORD bounce_sel = 0;

+  DWORD fifo_base_sel = 0;

   

   dbg_printf("VMWare SVGA-II init\n");

   

@@ -431,31 +436,44 @@ static int __loadds SVGA_full_init()
     return rc;

   }

   

-  /* gSVGA.fifoMem now holding physical address, map it to linear and convert this address to far pointer */

-  gSVGA.fifoPhy = (uint32)gSVGA.fifoMem;

-  fifosel = AllocLinearSelector(gSVGA.fifoPhy, gSVGA.fifoSize, &gSVGA.fifoLinear);

-  if(fifosel == 0)

+  /* get system linear addressed from PM32 RING-0 driver */

+  VXD_get_addr(&gSVGA.fbLinear, &gSVGA.fifoLinear, &gSVGA.fifo.bounceLinear);

+  

+  dbg_printf("VXD: received %lX %lX %lX\n",

+  	gSVGA.fbLinear,

+  	gSVGA.fifoLinear, 

+  	gSVGA.fifo.bounceLinear);

+  

+  /* map fifo to PM16 memory */

+  fifo_base_sel = DPMI_AllocLDTDesc(1);

+  if(fifo_base_sel)

   {

-    dbg_printf("SVGA: Failed to map FIFO memory!\n");

-    return 2;

+    DPMI_SetSegLimit(fifo_base_sel, 0xFFFF);

+    DPMI_SetSegBase(fifo_base_sel, gSVGA.fifoLinear);

+    gSVGA.fifoMem = fifo_base_sel :> 0x0;

   }

   

-  dbg_printf("SVGA: memory selector for fifo: %lX (physical: %lX, size: %lX)\n", fifosel, gSVGA.fifoMem, gSVGA.fifoSize);

-  gSVGA.fifoMem = fifosel :> 0x0;

-  

-  /* from PM16 cannot be accesed full fifo buffer properly, so allocate selector to maping as 64K sector */

+   /* from PM16 cannot be accesed full fifo buffer properly, so allocate selector to maping as 64K sector */

   gSVGA.fifoSel = DPMI_AllocLDTDesc(1);

   if(gSVGA.fifoSel)

   {

     DPMI_SetSegLimit(gSVGA.fifoSel, 0xFFFF);

+    DPMI_SetSegBase(gSVGA.fifoSel, gSVGA.fifoLinear);

     

     gSVGA.fifoAct = 0;

-    DPMI_SetSegBase(gSVGA.fifoSel, gSVGA.fifoLinear);

   }

   

-  /* sets FIFO */

-  SVGA_Enable();

+  bounce_sel = DPMI_AllocLDTDesc(1);

+  if(bounce_sel)

+  {

+		DPMI_SetSegLimit(bounce_sel, SVGA_BOUNCE_SIZE-1);

+		DPMI_SetSegBase(bounce_sel,  gSVGA.fifo.bounceLinear);

+		

+		gSVGA.fifo.bounceMem = bounce_sel :> 0x0;

+  }

   

+  //SVGA_Enable();

+    

   return 0;

 }

 #endif

@@ -593,7 +611,7 @@ int PhysicalEnable( void )
         }

         

         dwVideoMemorySize = SVGA_ReadReg(SVGA_REG_VRAM_SIZE);        

-        dwPhysVRAM = SVGA_ReadReg(SVGA_REG_FB_START);

+        //dwPhysVRAM = SVGA_ReadReg(SVGA_REG_FB_START);

 #else

         int     iChipID;

 

@@ -613,14 +631,16 @@ int PhysicalEnable( void )
         {

           dwVideoMemorySize = MAX_VRAM;

         }

-

-        dbg_printf( "PhysicalEnable: Hardware detected, dwVideoMemorySize=%lX dwPhysVRAM=%lX\n", dwVideoMemorySize, dwPhysVRAM );

-        

         

 #ifdef SVGA

         /* init here, there are locks for FIFO commands! */

         SVGAHDA_init();

+        dbg_printf( "PhysicalEnable: Hardware detected, dwVideoMemorySize=%lX\n", dwVideoMemorySize );

+#else

+        dbg_printf( "PhysicalEnable: Hardware detected, dwVideoMemorySize=%lX dwPhysVRAM=%lX\n", dwVideoMemorySize, dwPhysVRAM );

 #endif

+

+

     }

     

     dbg_printf("PhysicalEnable: continue with %ux%u\n", wScrX, wScrY);

@@ -638,18 +658,24 @@ int PhysicalEnable( void )
 

     /* Allocate an LDT selector for the screen. */

     if( !ScreenSelector ) {

+#ifndef SVGA

         //ScreenSelector = AllocLinearSelector( dwPhysVRAM, dwVideoMemorySize );

         ScreenSelector = AllocLinearSelector(dwPhysVRAM, dwVideoMemorySize, &dwScreenFlatAddr);

         if( !ScreenSelector ) {

             dbg_printf( "PhysicalEnable: AllocScreenSelector failed!\n" );

             return( 0 );

         }

-

-#ifdef SVGA   

-        gSVGA.fbLinear = dwScreenFlatAddr;

-        gSVGA.fbPhy = dwPhysVRAM;

+#else

+        ScreenSelector = DPMI_AllocLDTDesc(1);

+        

+        dbg_printf("%lX, %lX %lX\n", gSVGA.fbPhy, SVGA_ReadReg(SVGA_REG_FB_START), SVGA_ReadReg(SVGA_REG_FB_SIZE));

+        

+		    DPMI_SetSegBase(ScreenSelector,  gSVGA.fbLinear);

+		    DPMI_SetSegLimit(ScreenSelector, dwVideoMemorySize-1);

+		    

+        dwScreenFlatAddr = gSVGA.fbLinear;

         gSVGA.fbMem = ScreenSelector :> 0;

-          

+         

         /* update userspace hardware access */

         SVGAHDA_setmode();

 #endif

@@ -725,7 +751,7 @@ UINT WINAPI __loadds ValidateMode( DISPVALMODE FAR *lpValMode )
             }

             

             dwVideoMemorySize = SVGA_ReadReg(SVGA_REG_VRAM_SIZE);

-            dwPhysVRAM = SVGA_ReadReg(SVGA_REG_FB_START);

+            //dwPhysVRAM = SVGA_ReadReg(SVGA_REG_FB_START);

 #else

             int     iChipID;

 

@@ -740,8 +766,8 @@ UINT WINAPI __loadds ValidateMode( DISPVALMODE FAR *lpValMode )
 # else

             dwPhysVRAM = BOXV_get_lfb_base( 0 );

 # endif

-#endif

             dbg_printf( "ValidateMode: Hardware detected, dwVideoMemorySize=%lX dwPhysVRAM=%lX\n", dwVideoMemorySize, dwPhysVRAM );

+#endif

         }

 

         if( !IsModeOK( lpValMode->dvmXRes, lpValMode->dvmYRes, lpValMode->dvmBpp ) ) {

diff --git a/qemuvxd.c b/qemuvxd.c
index 72eb668..da7e0c0 100644
--- a/qemuvxd.c
+++ b/qemuvxd.c
@@ -26,6 +26,7 @@ THE SOFTWARE.
  * This file is generally C port of boxvmini.asm by Philip Kelley

  */

 

+#define VXD32

 #define QEMU

 

 #include "winhack.h"

diff --git a/types16.h b/types16.h
index 62a4092..a2d0302 100644
--- a/types16.h
+++ b/types16.h
@@ -12,6 +12,8 @@ typedef unsigned int uint16;
 typedef signed char int8;

 typedef unsigned char uint8;

 

+#define FARP __far

+

 #define fastcall

 

 #else

@@ -25,6 +27,8 @@ typedef unsigned short uint16;
 typedef signed char int8;

 typedef unsigned char uint8;

 

+#define FARP

+

 #endif

 

 typedef int Bool;

diff --git a/vmware/pci.c b/vmware/pci.c
index 93647b4..07ff86b 100644
--- a/vmware/pci.c
+++ b/vmware/pci.c
@@ -68,7 +68,7 @@
  */

 

 static uint32

-PCIConfigPackAddress(const PCIAddress  __far *addr, uint16 offset)

+PCIConfigPackAddress(const PCIAddress  FARP *addr, uint16 offset)

 {

    const uint32 enableBit = 0x80000000UL;

 

@@ -95,42 +95,42 @@ PCIConfigPackAddress(const PCIAddress  __far *addr, uint16 offset)
  */

 

 uint32

-PCI_ConfigRead32(const PCIAddress __far *addr, uint16 offset)

+PCI_ConfigRead32(const PCIAddress FARP *addr, uint16 offset)

 {

    outpd(PCI_REG_CONFIG_ADDRESS, PCIConfigPackAddress(addr, offset));

    return inpd(PCI_REG_CONFIG_DATA);

 }

 

 uint16

-PCI_ConfigRead16(const PCIAddress __far *addr, uint16 offset)

+PCI_ConfigRead16(const PCIAddress FARP *addr, uint16 offset)

 {

    outpd(PCI_REG_CONFIG_ADDRESS, PCIConfigPackAddress(addr, offset));

    return inpw(PCI_REG_CONFIG_DATA);

 }

 

 uint8

-PCI_ConfigRead8(const PCIAddress __far *addr, uint16 offset)

+PCI_ConfigRead8(const PCIAddress FARP *addr, uint16 offset)

 {

    outpd(PCI_REG_CONFIG_ADDRESS, PCIConfigPackAddress(addr, offset));

    return inp(PCI_REG_CONFIG_DATA);

 }

 

 void

-PCI_ConfigWrite32(const PCIAddress __far *addr, uint16 offset, uint32 data)

+PCI_ConfigWrite32(const PCIAddress FARP *addr, uint16 offset, uint32 data)

 {

    outpd(PCI_REG_CONFIG_ADDRESS, PCIConfigPackAddress(addr, offset));

    outpd(PCI_REG_CONFIG_DATA, data);

 }

 

 void

-PCI_ConfigWrite16(const PCIAddress __far *addr, uint16 offset, uint16 data)

+PCI_ConfigWrite16(const PCIAddress FARP *addr, uint16 offset, uint16 data)

 {

    outpd(PCI_REG_CONFIG_ADDRESS, PCIConfigPackAddress(addr, offset));

    outpw(PCI_REG_CONFIG_DATA, data);

 }

 

 void

-PCI_ConfigWrite8(const PCIAddress __far *addr, uint16 offset, uint8 data)

+PCI_ConfigWrite8(const PCIAddress FARP *addr, uint16 offset, uint8 data)

 {

    outpd(PCI_REG_CONFIG_ADDRESS, PCIConfigPackAddress(addr, offset));

    outpd(PCI_REG_CONFIG_DATA, data);

@@ -152,7 +152,7 @@ PCI_ConfigWrite8(const PCIAddress __far *addr, uint16 offset, uint8 data)
  */

 

 Bool

-PCI_ScanBus(PCIScanState __far *state)

+PCI_ScanBus(PCIScanState FARP *state)

 {

    PCIConfigSpace config;

 

@@ -190,7 +190,7 @@ PCI_ScanBus(PCIScanState __far *state)
  */

 

 Bool

-PCI_FindDevice(uint16 vendorId, uint16 deviceId, PCIAddress __far *addrOut)

+PCI_FindDevice(uint16 vendorId, uint16 deviceId, PCIAddress FARP *addrOut)

 {

    PCIScanState busScan = {0};

 

@@ -212,7 +212,7 @@ PCI_FindDevice(uint16 vendorId, uint16 deviceId, PCIAddress __far *addrOut)
  */

 

 void

-PCI_SetBAR(const PCIAddress __far *addr, int index, uint32 value)

+PCI_SetBAR(const PCIAddress FARP *addr, int index, uint32 value)

 {

    // PCI_ConfigWrite32(addr, offsetof(PCIConfigSpace, BAR[index]), value);

    PCI_ConfigWrite32(addr, 16+4*index, value);

@@ -229,7 +229,7 @@ PCI_SetBAR(const PCIAddress __far *addr, int index, uint32 value)
  */

 

 uint32

-PCI_GetBARAddr(const PCIAddress __far *addr, int index)

+PCI_GetBARAddr(const PCIAddress FARP *addr, int index)

 {

    // uint32 bar = PCI_ConfigRead32(addr, offsetof(PCIConfigSpace, BAR[index]));

    uint32 bar = PCI_ConfigRead32(addr, 16+4*index);

@@ -239,7 +239,7 @@ PCI_GetBARAddr(const PCIAddress __far *addr, int index)
 }

 

 uint32

-PCI_GetSubsystem(const PCIAddress __far *addr)

+PCI_GetSubsystem(const PCIAddress FARP *addr)

 {

 	uint32 subsys = PCI_ConfigRead32(addr, 44);

 	

@@ -256,7 +256,7 @@ PCI_GetSubsystem(const PCIAddress __far *addr)
  */

 

 void

-PCI_SetMemEnable(const PCIAddress __far *addr, Bool enable)

+PCI_SetMemEnable(const PCIAddress FARP *addr, Bool enable)

 {

    //uint16 command = PCI_ConfigRead16(addr, offsetof(PCIConfigSpace, command));

    uint16 command = PCI_ConfigRead16(addr, 4);

diff --git a/vmware/pci.h b/vmware/pci.h
index 080fc86..e62d059 100644
--- a/vmware/pci.h
+++ b/vmware/pci.h
@@ -66,7 +66,6 @@ typedef union PCIConfigSpace {
       uint8  maxLatency;       // 63

    };

 } PCIConfigSpace;

-#pragma pack(pop)

 

 typedef struct PCIAddress {

    uint8 bus, device, function, padding;

@@ -79,23 +78,25 @@ typedef struct PCIScanState {
    PCIAddress addr;

 } PCIScanState;

 

+#pragma pack(pop)

+

 // BAR bits

 #define PCI_CONF_BAR_IO          0x01

 #define PCI_CONF_BAR_64BIT       0x04

 #define PCI_CONF_BAR_PREFETCH    0x08

 

-uint32 PCI_ConfigRead32(const PCIAddress __far *addr, uint16 offset);

-uint16 PCI_ConfigRead16(const PCIAddress __far *addr, uint16 offset);

-uint8 PCI_ConfigRead8(const PCIAddress __far *addr, uint16 offset);

-void PCI_ConfigWrite32(const PCIAddress __far *addr, uint16 offset, uint32 data);

-void PCI_ConfigWrite16(const PCIAddress __far *addr, uint16 offset, uint16 data);

-void PCI_ConfigWrite8(const PCIAddress __far *addr, uint16 offset, uint8 data);

+uint32 PCI_ConfigRead32(const PCIAddress FARP *addr, uint16 offset);

+uint16 PCI_ConfigRead16(const PCIAddress FARP *addr, uint16 offset);

+uint8 PCI_ConfigRead8(const PCIAddress FARP *addr, uint16 offset);

+void PCI_ConfigWrite32(const PCIAddress FARP *addr, uint16 offset, uint32 data);

+void PCI_ConfigWrite16(const PCIAddress FARP *addr, uint16 offset, uint16 data);

+void PCI_ConfigWrite8(const PCIAddress FARP *addr, uint16 offset, uint8 data);

 

-Bool PCI_ScanBus(PCIScanState  __far *state);

-Bool PCI_FindDevice(uint16 vendorId, uint16 deviceId, PCIAddress __far *addrOut);

-void PCI_SetBAR(const PCIAddress __far *addr, int index, uint32 value);

-uint32 PCI_GetBARAddr(const PCIAddress __far *addr, int index);

-void PCI_SetMemEnable(const PCIAddress __far *addr, Bool enable);

-uint32 PCI_GetSubsystem(const PCIAddress __far *addr);

+Bool PCI_ScanBus(PCIScanState  FARP *state);

+Bool PCI_FindDevice(uint16 vendorId, uint16 deviceId, PCIAddress FARP *addrOut);

+void PCI_SetBAR(const PCIAddress FARP *addr, int index, uint32 value);

+uint32 PCI_GetBARAddr(const PCIAddress FARP *addr, int index);

+void PCI_SetMemEnable(const PCIAddress FARP *addr, Bool enable);

+uint32 PCI_GetSubsystem(const PCIAddress FARP *addr);

 

 #endif /* __PCI_H__ */

diff --git a/vmware/svga.c b/vmware/svga.c
index 0091a19..2463e8d 100644
--- a/vmware/svga.c
+++ b/vmware/svga.c
@@ -35,7 +35,6 @@
 #include "winhack.h"
 
 #include "svga_all.h"
-#include "pci.h"
 
 #ifdef VXD32
 #define IO_IN32
@@ -70,7 +69,7 @@ void dbg_printf( const char *s, ... );
 #endif
 
 
-SVGADevice gSVGA;
+SVGADevice gSVGA = {0};
 
 static void SVGAFIFOFull(void);
 
@@ -92,6 +91,9 @@ static void SVGAInterruptHandler(int vector);
 #pragma code_seg( _INIT )
 #endif
 
+static char dbg_addr[] = "PCI bars: %lx %lx %lx\n";
+static char dbg_siz[] = "Size of gSVGA(1) = %d %d\n";
+
 /*
  *-----------------------------------------------------------------------------
  *
@@ -133,7 +135,7 @@ SVGA_Init(Bool enableFIFO)
       vga_found = 1;
    }
    
-   if (PCI_FindDevice(PCI_VENDOR_ID_INNOTEK, PCI_DEVICE_ID_VBOX_VGA, &gSVGA.pciAddr)) {   
+   if (PCI_FindDevice(PCI_VENDOR_ID_INNOTEK, PCI_DEVICE_ID_VBOX_VGA, &gSVGA.pciAddr)) {
    	  uint32 subsys = PCI_GetSubsystem(&gSVGA.pciAddr);
       if(subsys == PCI_SUBCLASS_ID_SVGA2)
       {
@@ -153,7 +155,7 @@ SVGA_Init(Bool enableFIFO)
    }
    
    if(vga_found == 0)
-   {   
+   {
       Console_Panic("No VMware SVGA device found.");
       return 1;
    }
@@ -166,15 +168,17 @@ SVGA_Init(Bool enableFIFO)
    PCI_SetMemEnable(&gSVGA.pciAddr, TRUE);
    if(gSVGA.deviceId == PCI_DEVICE_ID_VBOX_VGA) {
    	  /* VBox SVGA have swapped IO and VRAM in PCI BAR */
-      gSVGA.fbMem = (void __far*) PCI_GetBARAddr(&gSVGA.pciAddr, 0);
+      gSVGA.fbPhy  = PCI_GetBARAddr(&gSVGA.pciAddr, 0);
       gSVGA.ioBase = PCI_GetBARAddr(&gSVGA.pciAddr, 1);
    } else {
       gSVGA.ioBase = PCI_GetBARAddr(&gSVGA.pciAddr, 0);
-      gSVGA.fbMem = (void __far*) PCI_GetBARAddr(&gSVGA.pciAddr, 1);
+      gSVGA.fbPhy  = PCI_GetBARAddr(&gSVGA.pciAddr, 1);
    }
-   gSVGA.fifoMem = (void __far*) PCI_GetBARAddr(&gSVGA.pciAddr, 2);
+   gSVGA.fifoPhy = PCI_GetBARAddr(&gSVGA.pciAddr, 2);
+   
+   dbg_printf(dbg_addr, gSVGA.ioBase, gSVGA.fbPhy, gSVGA.fifoPhy);
 
-#ifndef VXD32 /* version negotiation is done in PM16 driver, only get addresses here */
+#ifdef VXD32 /* version negotiation is done in PM32 driver now */
    /*
     * Version negotiation:
     *
@@ -195,8 +199,14 @@ SVGA_Init(Bool enableFIFO)
    } while (gSVGA.deviceVersionId >= SVGA_ID_0);
 
    if (gSVGA.deviceVersionId < SVGA_ID_0) {
+#if 0
       Console_Panic("Error negotiating SVGA device version.");
+#endif
+      return 2;
    }
+#else /* !VXD32 */
+   /* version is already set by VXD driver - only read register with ID */
+   gSVGA.deviceVersionId = SVGA_ReadReg(SVGA_REG_ID);
 #endif
 
    /*
@@ -214,9 +224,12 @@ SVGA_Init(Bool enableFIFO)
     * These are arbitrary values.
     */
 
+#ifdef VXD32
    if (gSVGA.fbSize < 0x100000) {
       SVGA_Panic("FB size very small, probably incorrect.");
    }
+#endif
+
    if (gSVGA.fifoSize < 0x20000) {
       SVGA_Panic("FIFO size very small, probably incorrect.");
    }
@@ -259,6 +272,7 @@ SVGA_Init(Bool enableFIFO)
    gSVGA.fifoSel    = 0;
    gSVGA.fifoAct    = 0;
    
+#ifdef VXD32
    /* set if SVGA supporting different BPP then 32 */
    SVGA_WriteReg(SVGA_REG_ENABLE, TRUE);
    SVGA_WriteReg(SVGA_REG_CONFIG_DONE, TRUE);
@@ -279,6 +293,9 @@ SVGA_Init(Bool enableFIFO)
    {
    	 SVGA_Enable();
    }
+#endif
+
+   dbg_printf(dbg_siz, sizeof(gSVGA), sizeof(uint8 FARP *));
    
    return 0;
 }
@@ -641,10 +658,10 @@ SVGA_HasFIFOCap(unsigned long cap)
  *-----------------------------------------------------------------------------
  */
 
-void __far *
+void FARP *
 SVGA_FIFOReserve(uint32 bytes)  // IN
 {
-   volatile uint32 __far *fifo = gSVGA.fifoMem;
+   volatile uint32 FARP *fifo = gSVGA.fifoMem;
    uint32 max = fifo[SVGA_FIFO_MAX];
    uint32 min = fifo[SVGA_FIFO_MIN];
 #if 0
@@ -658,7 +675,7 @@ SVGA_FIFOReserve(uint32 bytes)  // IN
     * dynamically allocate a buffer if and only if it's necessary.
     */
 
-   if (bytes > sizeof gSVGA.fifo.bounceBuffer ||
+   if (bytes > SVGA_BOUNCE_SIZE /*sizeof gSVGA.fifo.bounceBuffer*/ ||
        bytes > (max - min)) {
       SVGA_Panic("FIFO command too large");
    }
@@ -755,7 +772,7 @@ SVGA_FIFOReserve(uint32 bytes)  // IN
             if (reserveable) {
                fifo[SVGA_FIFO_RESERVED] = bytes;
             }
-            return nextCmd + (uint8 __far*) fifo;
+            return nextCmd + (uint8 FARP*) fifo;
          } else {
             /*
              * Need to bounce because we can't trust the VMX to safely
@@ -772,12 +789,15 @@ SVGA_FIFOReserve(uint32 bytes)  // IN
        */
       if (needBounce) {
          gSVGA.fifo.usingBounceBuffer = TRUE;
-         return (void __far *)(&gSVGA.fifo.bounceBuffer[0]);
+         return (void FARP *)(&gSVGA.fifo.bounceBuffer[0]);
       }
    } /* while (1) */
 #else
+#if 0
   gSVGA.fifo.usingBounceBuffer = TRUE;
-  return (void __far *)(&gSVGA.fifo.bounceBuffer[0]);
+  return (void FARP *)(&gSVGA.fifo.bounceBuffer[0]);
+#endif
+	return (void FARP *)(gSVGA.fifo.bounceMem);
 #endif
 }
 
@@ -814,7 +834,7 @@ static void WriteFifo(uint32 pos, uint32 dw)
 	uint32 act = pos >> 16;
 	uint16 off = pos & 0xFFFF;
 	
-	uint32 __far *ptr;
+	uint32 FARP *ptr;
 	
 	if(act != gSVGA.fifoAct)
 	{
@@ -824,7 +844,7 @@ static void WriteFifo(uint32 pos, uint32 dw)
 	
 	//dbg_printf("Fifo: %ld (%X:%X)\n", pos, gSVGA.fifoAct, off);
 	
-	ptr = (uint32 __far *)(gSVGA.fifoSel :> off);
+	ptr = (uint32 FARP *)(gSVGA.fifoSel :> off);
 	
 	*ptr = dw;
 }
@@ -833,23 +853,28 @@ static void WriteFifo(uint32 pos, uint32 dw)
 void
 SVGA_FIFOCommit(uint32 bytes)  // IN
 {
-   volatile uint32 __far *fifo = gSVGA.fifoMem;
+   volatile uint32 FARP *fifo = gSVGA.fifoMem;
    uint32 nextCmd = fifo[SVGA_FIFO_NEXT_CMD];
    uint32 max = fifo[SVGA_FIFO_MAX];
    uint32 min = fifo[SVGA_FIFO_MIN];
-   Bool reserveable = 0; //SVGA_HasFIFOCap(SVGA_FIFO_CAP_RESERVE);
+   //Bool reserveable = SVGA_HasFIFOCap(SVGA_FIFO_CAP_RESERVE);
 
    if (gSVGA.fifo.reservedSize == 0) {
       SVGA_Panic("FIFOCommit before FIFOReserve");
    }
+
    gSVGA.fifo.reservedSize = 0;
 
-   if (gSVGA.fifo.usingBounceBuffer) {
+#if 0 /* always using bounce buffer */
+   if (gSVGA.fifo.usingBounceBuffer)
+#endif
+   {
       /*
        * Slow paths: copy out of a bounce buffer.
        */
-      uint8 __far *buffer = gSVGA.fifo.bounceBuffer;
+      uint8 FARP *buffer = gSVGA.fifo.bounceMem;
 
+#if 0
       if (reserveable) {
          /*
           * Slow path: bulk copy out of a bounce buffer in two chunks.
@@ -865,17 +890,19 @@ SVGA_FIFOCommit(uint32 bytes)  // IN
 
          uint32 chunkSize = MIN(bytes, max - nextCmd);
          fifo[SVGA_FIFO_RESERVED] = bytes;
-         drv_memcpy(nextCmd + (uint8 __far*) fifo, buffer, chunkSize);
-         drv_memcpy(min + (uint8 __far*) fifo, buffer + chunkSize, bytes - chunkSize);
+         drv_memcpy(nextCmd + (uint8 FARP*) fifo, buffer, chunkSize);
+         drv_memcpy(min + (uint8 FARP*) fifo, buffer + chunkSize, bytes - chunkSize);
 
-      } else {
+      } else
+#endif
+      {
          /*
           * Slowest path: copy one dword at a time, updating NEXT_CMD as
           * we go, so that we bound how much data the guest has written
           * and the host doesn't know to checkpoint.
           */
 
-         uint32 *dword = (uint32 *)buffer;
+         uint32 FARP *dword = (uint32 FARP *)buffer;
 
          while (bytes > 0) {
             //fifo[nextCmd / sizeof(uint32)] = *dword++;
@@ -897,6 +924,7 @@ SVGA_FIFOCommit(uint32 bytes)  // IN
       }
    }
 
+#if 0
    /*
     * Atomically update NEXT_CMD, if we didn't already
     */
@@ -914,6 +942,7 @@ SVGA_FIFOCommit(uint32 bytes)  // IN
    if (reserveable) {
       fifo[SVGA_FIFO_RESERVED] = 0;
    }
+#endif
 }
 
 
@@ -961,11 +990,11 @@ SVGA_FIFOCommitAll(void)
  *-----------------------------------------------------------------------------
  */
 
-void __far *
+void FARP *
 SVGA_FIFOReserveCmd(uint32 type,   // IN
                     uint32 bytes)  // IN
 {
-   uint32 __far *cmd = SVGA_FIFOReserve(bytes + sizeof type);
+   uint32 FARP *cmd = SVGA_FIFOReserve(bytes + sizeof type);
    cmd[0] = type;
    return cmd + 1;
 }
@@ -997,7 +1026,7 @@ SVGA_FIFOReserveCmd(uint32 type,   // IN
  *-----------------------------------------------------------------------------
  */
 
-void __far *
+void FARP *
 SVGA_FIFOReserveEscape(uint32 nsid,   // IN
                        uint32 bytes)  // IN
 {
@@ -1008,7 +1037,7 @@ SVGA_FIFOReserveEscape(uint32 nsid,   // IN
       uint32 cmd;
       uint32 nsid;
       uint32 size;
-   } __far *header;
+   } FARP *header;
 #pragma pack(pop)
    
    header = SVGA_FIFOReserve(paddedBytes + sizeof(*header));
@@ -1135,7 +1164,7 @@ SVGA_InsertFence(void)
    struct {
       uint32 id;
       uint32 fence;
-   } __far *cmd;
+   } FARP *cmd;
 #pragma pack(pop)
 
    if (!SVGA_HasFIFOCap(SVGA_FIFO_CAP_FENCE)) {
@@ -1447,6 +1476,9 @@ void SVGA_Flush(void)
 {
 		SVGA_WriteReg(SVGA_REG_SYNC, 1);
 		while (SVGA_ReadReg(SVGA_REG_BUSY) != FALSE);
+#ifndef VXD32
+    dbg_printf("SVGA_Flush\n");
+#endif
 }
 
 
@@ -1686,9 +1718,9 @@ SVGAInterruptHandler(int vector)  // IN (unused)
  *----------------------------------------------------------------------
  */
 
-void __far *
+void FARP *
 SVGA_AllocGMR(uint32 size,        // IN
-              SVGAGuestPtr __far *ptr)  // OUT
+              SVGAGuestPtr FARP *ptr)  // OUT
 {
    static SVGAGuestPtr nextPtr = { SVGA_GMR_FRAMEBUFFER, 0 };
    *ptr = nextPtr;
@@ -1719,7 +1751,7 @@ SVGA_Update(uint32 x,       // IN
             uint32 width,   // IN
             uint32 height)  // IN
 {
-   SVGAFifoCmdUpdate __far *cmd = SVGA_FIFOReserveCmd(SVGA_CMD_UPDATE, sizeof *cmd);
+   SVGAFifoCmdUpdate FARP *cmd = SVGA_FIFOReserveCmd(SVGA_CMD_UPDATE, sizeof *cmd);
    cmd->x = x;
    cmd->y = y;
    cmd->width = width;
@@ -1748,20 +1780,20 @@ SVGA_Update(uint32 x,       // IN
  */
 
 void
-SVGA_BeginDefineCursor(const SVGAFifoCmdDefineCursor __far *cursorInfo,  // IN
-                       void __far * __far *andMask,                      // OUT
-                       void __far * __far *xorMask)                      // OUT
+SVGA_BeginDefineCursor(const SVGAFifoCmdDefineCursor FARP *cursorInfo,  // IN
+                       void FARP * FARP *andMask,                      // OUT
+                       void FARP * FARP *xorMask)                      // OUT
 {
    uint32 andPitch = ((cursorInfo->andMaskDepth * cursorInfo->width + 31) >> 5) << 2;
    uint32 andSize = andPitch * cursorInfo->height;
    uint32 xorPitch = ((cursorInfo->xorMaskDepth * cursorInfo->width + 31) >> 5) << 2;
    uint32 xorSize = xorPitch * cursorInfo->height;
 
-   SVGAFifoCmdDefineCursor __far *cmd = SVGA_FIFOReserveCmd(SVGA_CMD_DEFINE_CURSOR,
+   SVGAFifoCmdDefineCursor FARP *cmd = SVGA_FIFOReserveCmd(SVGA_CMD_DEFINE_CURSOR,
                                                       sizeof *cmd + andSize + xorSize);
    *cmd = *cursorInfo;
    *andMask = (void*) (cmd + 1);
-   *xorMask = (void*) (andSize + (uint8 __far*) *andMask);
+   *xorMask = (void*) (andSize + (uint8 FARP*) *andMask);
 }
 
 
@@ -1786,11 +1818,11 @@ SVGA_BeginDefineCursor(const SVGAFifoCmdDefineCursor __far *cursorInfo,  // IN
  */
 
 void
-SVGA_BeginDefineAlphaCursor(const SVGAFifoCmdDefineAlphaCursor __far *cursorInfo,  // IN
-                            void __far * __far * data)                             // OUT
+SVGA_BeginDefineAlphaCursor(const SVGAFifoCmdDefineAlphaCursor FARP *cursorInfo,  // IN
+                            void FARP * FARP * data)                             // OUT
 {
    uint32 imageSize = cursorInfo->width * cursorInfo->height * sizeof(uint32);
-   SVGAFifoCmdDefineAlphaCursor __far *cmd = SVGA_FIFOReserveCmd(SVGA_CMD_DEFINE_ALPHA_CURSOR,
+   SVGAFifoCmdDefineAlphaCursor FARP *cmd = SVGA_FIFOReserveCmd(SVGA_CMD_DEFINE_ALPHA_CURSOR,
                                                            sizeof *cmd + imageSize);
    *cmd = *cursorInfo;
    *data = (void*) (cmd + 1);
@@ -1853,9 +1885,9 @@ SVGA_MoveCursor(uint32 visible,   // IN
 void
 SVGA_BeginVideoSetRegs(uint32 streamId,                   // IN
                        uint32 numItems,                   // IN
-                       SVGAEscapeVideoSetRegs __far * __far * setRegs)  // OUT
+                       SVGAEscapeVideoSetRegs FARP * FARP * setRegs)  // OUT
 {
-   SVGAEscapeVideoSetRegs __far *cmd;
+   SVGAEscapeVideoSetRegs FARP *cmd;
    uint32 cmdSize = (sizeof *cmd
                      - sizeof cmd->items
                      + numItems * sizeof cmd->items[0]);
@@ -1896,12 +1928,12 @@ SVGA_BeginVideoSetRegs(uint32 streamId,                   // IN
 
 void
 SVGA_VideoSetAllRegs(uint32 streamId,        // IN
-                     SVGAOverlayUnit __far *regs,  // IN
+                     SVGAOverlayUnit FARP *regs,  // IN
                      uint32 maxReg)          // IN
 {
-   uint32 __far *regArray = (uint32 __far*) regs;
+   uint32 FARP *regArray = (uint32 FARP*) regs;
    const uint32 numRegs = maxReg + 1;
-   SVGAEscapeVideoSetRegs __far *setRegs;
+   SVGAEscapeVideoSetRegs FARP *setRegs;
    uint32 i;
 
    SVGA_BeginVideoSetRegs(streamId, numRegs, &setRegs);
@@ -1940,7 +1972,7 @@ SVGA_VideoSetReg(uint32 streamId,    // IN
                  uint32 registerId,  // IN
                  uint32 value)       // IN
 {
-   SVGAEscapeVideoSetRegs __far *setRegs;
+   SVGAEscapeVideoSetRegs FARP *setRegs;
 
    SVGA_BeginVideoSetRegs(streamId, 1, &setRegs);
    setRegs->items[0].registerId = registerId;
@@ -1978,7 +2010,7 @@ SVGA_VideoSetReg(uint32 streamId,    // IN
 void
 SVGA_VideoFlush(uint32 streamId)  // IN
 {
-   SVGAEscapeVideoFlush __far *cmd;
+   SVGAEscapeVideoFlush FARP *cmd;
 
    cmd = SVGA_FIFOReserveEscape(SVGA_ESCAPE_NSID_VMWARE, sizeof *cmd);
    cmd->cmdType = SVGA_ESCAPE_VMWARE_VIDEO_FLUSH;
diff --git a/vmware/svga.h b/vmware/svga.h
index 1800982..bb2bd2b 100644
--- a/vmware/svga.h
+++ b/vmware/svga.h
@@ -52,13 +52,13 @@
 typedef struct SVGADevice {
    PCIAddress pciAddr;    // 0
    uint32     ioBase;     // 4
-   uint32 __far *fifoMem; // 8
-   uint8  __far *fbMem;   // 16
-   uint32     fifoSize;   // 20
+   uint32 FARP *fifoMem;  // 8
+   uint8  FARP *fbMem;    // 12
+   uint32     fifoSize;   // 16
    
-   uint32     fifoLinear; // 24
-   uint16     fifoSel;    // 28
-   uint16     fifoAct;    // 32
+   uint32     fifoLinear; // 20
+   uint16     fifoSel;    // 22
+   uint16     fifoAct;    // 24
    
    uint32     fifoPhy;
    
@@ -77,15 +77,21 @@ typedef struct SVGADevice {
 
    struct {
       uint32  reservedSize;
+#if 0
       Bool    usingBounceBuffer;
       uint8   bounceBuffer[16 * 1024];
+#else
+      uint32  bouncePhy;
+      uint32  bounceLinear;
+      uint8 FARP *bounceMem;
+#endif
       uint32  nextFence;
    } fifo;
   
    /* VMWare SVGAII and VBox SVGA is same device with different PCI ID */
    uint16 vendorId;
    uint16 deviceId;
-   /* adaper in QEMU works only on 32bit */
+   /* adapter in QEMU works only on 32bit */
    uint32 only32bit;
 
 #ifndef REALLY_TINY
@@ -100,6 +106,8 @@ typedef struct SVGADevice {
 
 } SVGADevice;
 
+#define SVGA_BOUNCE_SIZE (16*1024)
+
 extern SVGADevice gSVGA;
 
 #ifndef VXD32
@@ -123,9 +131,9 @@ uint32 SVGA_WaitForIRQ();
 Bool SVGA_IsFIFORegValid(int reg);
 Bool SVGA_HasFIFOCap(unsigned long cap);
 
-void __far *SVGA_FIFOReserve(uint32 bytes);
-void __far *SVGA_FIFOReserveCmd(uint32 type, uint32 bytes);
-void __far *SVGA_FIFOReserveEscape(uint32 nsid, uint32 bytes);
+void FARP *SVGA_FIFOReserve(uint32 bytes);
+void FARP *SVGA_FIFOReserveCmd(uint32 type, uint32 bytes);
+void FARP *SVGA_FIFOReserveEscape(uint32 nsid, uint32 bytes);
 void SVGA_FIFOCommit(uint32 bytes);
 void SVGA_FIFOCommitAll(void);
 
@@ -134,20 +142,20 @@ void SVGA_SyncToFence(uint32 fence);
 Bool SVGA_HasFencePassed(uint32 fence);
 void SVGA_RingDoorbell(void);
 
-void __far *SVGA_AllocGMR(uint32 size, SVGAGuestPtr __far *ptr);
+void FARP *SVGA_AllocGMR(uint32 size, SVGAGuestPtr FARP *ptr);
 
 /* 2D commands */
 
 void SVGA_Update(uint32 x, uint32 y, uint32 width, uint32 height);
-void SVGA_BeginDefineCursor(const SVGAFifoCmdDefineCursor __far *cursorInfo,
-                            void __far * __far *andMask, void __far * __far *xorMask);
-void SVGA_BeginDefineAlphaCursor(const SVGAFifoCmdDefineAlphaCursor __far *cursorInfo,
-                                 void __far * __far *data);
+void SVGA_BeginDefineCursor(const SVGAFifoCmdDefineCursor FARP *cursorInfo,
+                            void FARP * FARP *andMask, void FARP * FARP *xorMask);
+void SVGA_BeginDefineAlphaCursor(const SVGAFifoCmdDefineAlphaCursor FARP *cursorInfo,
+                                 void FARP * FARP *data);
 void SVGA_MoveCursor(uint32 visible, uint32 x, uint32 y, uint32 screenId);
 
 void SVGA_BeginVideoSetRegs(uint32 streamId, uint32 numItems,
-                            SVGAEscapeVideoSetRegs __far * __far *setRegs);
-void SVGA_VideoSetAllRegs(uint32 streamId, SVGAOverlayUnit __far *regs, uint32 maxReg);
+                            SVGAEscapeVideoSetRegs FARP * FARP *setRegs);
+void SVGA_VideoSetAllRegs(uint32 streamId, SVGAOverlayUnit FARP *regs, uint32 maxReg);
 void SVGA_VideoSetReg(uint32 streamId, uint32 registerId, uint32 value);
 void SVGA_VideoFlush(uint32 streamId);
 
diff --git a/vmware/svga3d.c b/vmware/svga3d.c
index bd48035..b904140 100644
--- a/vmware/svga3d.c
+++ b/vmware/svga3d.c
@@ -78,14 +78,14 @@ SVGA3D_Init(void)
    SVGA3dHardwareVersion hwVersion;
 
    if (!(gSVGA.capabilities & SVGA_CAP_EXTENDED_FIFO)) {
-      dbg_printf("3D requires the Extended FIFO capability.");
+      dbg_printf("3D requires the Extended FIFO capability.\n");
    }
 
    if (SVGA_HasFIFOCap(SVGA_FIFO_CAP_3D_HWVERSION_REVISED)) {
       hwVersion = gSVGA.fifoMem[SVGA_FIFO_3D_HWVERSION_REVISED];
    } else {
       if (gSVGA.fifoMem[SVGA_FIFO_MIN] <= sizeof(uint32) * SVGA_FIFO_GUEST_3D_HWVERSION) {
-         dbg_printf("GUEST_3D_HWVERSION register not present.");
+         dbg_printf("GUEST_3D_HWVERSION register not present.\n");
       }
       hwVersion = gSVGA.fifoMem[SVGA_FIFO_3D_HWVERSION];
    }
@@ -138,7 +138,7 @@ void *
 SVGA3D_FIFOReserve(uint32 cmd,      // IN
                    uint32 cmdSize)  // IN
 {
-   SVGA3dCmdHeader __far *header;
+   SVGA3dCmdHeader FARP *header;
 
    header = SVGA_FIFOReserve(sizeof *header + cmdSize);
    header->id = cmd;
diff --git a/vmwsvxd.c b/vmwsvxd.c
index 54fe7d3..2958b44 100644
--- a/vmwsvxd.c
+++ b/vmwsvxd.c
@@ -22,6 +22,7 @@ THE SOFTWARE.
 

 *****************************************************************************/

 

+#define VXD32

 #define SVGA

 

 #include "winhack.h"

@@ -120,7 +121,12 @@ char dbg_gb_on[] = "GB supported and allocated\n";
 char dbg_cb_ena[] = "CB context 0 enabled\n";

 

 char dbg_region_info_1[] = "Region id = %d\n";

-char dbg_region_info_2[] ="Region address = %lX, PPN = %lX, GMRBLK = %lX\n";

+char dbg_region_info_2[] = "Region address = %lX, PPN = %lX, GMRBLK = %lX\n";

+

+char dbg_mapping[] = "Memory mapping:\n";

+char dbg_mapping_map[] = "  %X -> %X\n";

+

+static char dbg_siz[] = "Size of gSVGA(2) = %d %d\n";

 

 #endif

 

@@ -220,6 +226,11 @@ ULONG __declspec(naked) __cdecl _LinPageUnLock(ULONG page, ULONG npages, ULONG f
 	VMMJmp(_LinPageUnLock);

 }

 

+ULONG __declspec(naked) __cdecl _MapPhysToLinear(ULONG PhysAddr, ULONG nBytes, ULONG flags)

+{

+	VMMJmp(_MapPhysToLinear);

+}

+

 /**

  * VDD calls wrapers

  **/

@@ -888,19 +899,9 @@ WORD __stdcall VMWS_API_Proc(PCRS_32 state)
 		}

 		/* clear memory on linear address (ESI) by defined size (ECX) */

 		case VMWSVXD_PM16_ZEROMEM:

-		{

-			/*

-			ULONG i = 0;

-			unsigned char *ptr = (unsigned char *)state->Client_ESI;

-			for(i = 0; i < state->Client_ECX; i++)

-			{

-				ptr[i] = 0;

-			}

-			*/

 			memset((void*)state->Client_ESI, 0, state->Client_ECX);

 			rc = 1;

 			break;

-		}

 		/* set ECX to actual api version */

 		case VMWSVXD_PM16_APIVER:

 			state->Client_ECX = DRV_API_LEVEL;

@@ -946,6 +947,17 @@ WORD __stdcall VMWS_API_Proc(PCRS_32 state)
 			}

 			rc = 1;

 			break;

+		case VMWSVXD_PM16_GET_ADDR:

+			state->Client_ECX = gSVGA.fbLinear;

+			state->Client_EDI = gSVGA.fifoLinear;

+			state->Client_ESI = gSVGA.fifo.bounceLinear + PAGE_SIZE; /* first page is for CB header (if CB supported) */

+			

+			rc = 1;

+			break;

+		case VMWSVXD_PM16_FIFO_COMMIT:

+			

+			rc = 1;

+			break;

 	}

 	

 	if(rc == 0xFFFF)

@@ -999,7 +1011,38 @@ void Device_Init_proc()
 	{

 		dbg_printf(dbg_Device_Init_proc_succ);

 		svga_init_success = TRUE;

-			

+		

+		dbg_printf(dbg_mapping_map, gSVGA.fbPhy, gSVGA.fifoPhy);

+		

+		/* map phys FB to linear */

+		gSVGA.fbLinear = _MapPhysToLinear(gSVGA.fbPhy, gSVGA.vramSize, 0);

+		

+		/* map phys FIFO to linear */

+		gSVGA.fifoLinear = _MapPhysToLinear(gSVGA.fifoPhy, gSVGA.fifoSize, 0);

+		

+		/* allocate fifo bounce buffer */

+		gSVGA.fifo.bounceLinear =

+			_PageAllocate(

+				(SVGA_BOUNCE_SIZE + PAGE_SIZE)/PAGE_SIZE,

+				PG_SYS, 0, 0, 0x0, 0x100000, &(gSVGA.fifo.bouncePhy), PAGECONTIG | PAGEUSEALIGN | PAGEFIXED

+			);

+		

+		/* system linear addres == PM32 address */

+		gSVGA.fbMem = (uint8 *)gSVGA.fbLinear;

+		gSVGA.fifoMem = (uint32 *)gSVGA.fifoLinear;

+		gSVGA.fifo.bounceMem = (uint8 *)(gSVGA.fifo.bounceLinear + PAGE_SIZE); /* first page is for CB header (if CB supported) */

+		

+		

+		dbg_printf(dbg_mapping);

+		dbg_printf(dbg_mapping_map, gSVGA.fbPhy, gSVGA.fbMem);

+		dbg_printf(dbg_mapping_map, gSVGA.fifoPhy, gSVGA.fifoMem);

+		dbg_printf(dbg_mapping_map, gSVGA.fifo.bouncePhy, gSVGA.fifo.bounceMem);

+		dbg_printf(dbg_siz, sizeof(gSVGA), sizeof(uint8 FARP *));

+		

+		/* enable FIFO */

+		SVGA_Enable();

+		

+		/* allocate GB tables, if supported */

 		if(SVGA_ReadReg(SVGA_REG_CAPABILITIES) & SVGA_CAP_GBOBJECTS)

 		{

 			AllocateOTable();

@@ -1007,13 +1050,15 @@ void Device_Init_proc()
 			dbg_printf(dbg_gb_on);

 		}

 		

+		/* allocate command buffers if supported */

 		if(SVGA_ReadReg(SVGA_REG_CAPABILITIES) & (SVGA_CAP_COMMAND_BUFFERS | SVGA_CAP_CMD_BUFFERS_2))

 		{

 			AllocateCB();

 			cb_support = TRUE;

 			dbg_printf(dbg_cb_on);

 		}

-			

+		

+		/* register miniVDD functions */

 		VDD_Get_Mini_Dispatch_Table();

 		if(DispatchTableLength >= 0x31)

 		{

diff --git a/vmwsvxd.h b/vmwsvxd.h
index f991704..0941fcc 100644
--- a/vmwsvxd.h
+++ b/vmwsvxd.h
@@ -18,5 +18,7 @@
 #define VMWSVXD_PM16_APIVER                       7

 #define VMWSVXD_PM16_CB_START                     8

 #define VMWSVXD_PM16_CB_STOP                      9

+#define VMWSVXD_PM16_GET_ADDR                     10

+#define VMWSVXD_PM16_FIFO_COMMIT                  11

 

 #endif