aboutsummaryrefslogtreecommitdiffstats
path: root/tests/fate/hevc.mak
blob: 9afe71732acf485b550161cb3f29030771fc84f8 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
HEVC_SAMPLES =                  \
    AMP_A_Samsung_4             \
    AMP_B_Samsung_4             \
    AMVP_C_Samsung_4            \
    AMP_D_Hisilicon             \
    AMP_E_Hisilicon             \
    AMP_F_Hisilicon_3           \
    AMVP_A_MTK_4                \
    AMVP_B_MTK_4                \
    CAINIT_A_SHARP_4            \
    CAINIT_B_SHARP_4            \
    CAINIT_C_SHARP_3            \
    CAINIT_D_SHARP_3            \
    CAINIT_E_SHARP_3            \
    CAINIT_F_SHARP_3            \
    CAINIT_G_SHARP_3            \
    CAINIT_H_SHARP_3            \
    CIP_A_Panasonic_3           \
    cip_B_NEC_3                 \
    CIP_C_Panasonic_2           \
    DBLK_A_SONY_3               \
    DBLK_B_SONY_3               \
    DBLK_C_SONY_3               \
    DBLK_D_VIXS_1               \
    DBLK_D_VIXS_2               \
    DBLK_E_VIXS_1               \
    DBLK_E_VIXS_2               \
    DBLK_F_VIXS_1               \
    DBLK_F_VIXS_2               \
    DBLK_G_VIXS_1               \
    DBLK_G_VIXS_2               \
    DELTAQP_B_SONY_3            \
    DELTAQP_C_SONY_3            \
    DSLICE_A_HHI_5              \
    DSLICE_B_HHI_5              \
    DSLICE_C_HHI_5              \
    ENTP_A_LG_2                 \
    ENTP_B_LG_2                 \
    ENTP_C_LG_3                 \
    EXT_A_ericsson_4            \
    ipcm_A_NEC_3                \
    ipcm_B_NEC_3                \
    ipcm_C_NEC_3                \
    ipcm_D_NEC_3                \
    ipcm_E_NEC_2                \
    IPRED_A_docomo_2            \
    IPRED_B_Nokia_3             \
    IPRED_C_Mitsubishi_2        \
    LS_A_Orange_2               \
    LS_B_ORANGE_4               \
    LTRPSPS_A_Qualcomm_1        \
    MAXBINS_A_TI_4              \
    MAXBINS_B_TI_4              \
    MAXBINS_C_TI_4              \
    MERGE_A_TI_3                \
    MERGE_B_TI_3                \
    MERGE_C_TI_3                \
    MERGE_D_TI_3                \
    MERGE_E_TI_3                \
    MERGE_F_MTK_4               \
    MERGE_G_HHI_4               \
    MVCLIP_A_qualcomm_3         \
    MVDL1ZERO_A_docomo_3        \
    MVEDGE_A_qualcomm_3         \
    NUT_A_ericsson_5            \
    PICSIZE_A_Bossen_1          \
    PICSIZE_B_Bossen_1          \
    PICSIZE_C_Bossen_1          \
    PICSIZE_D_Bossen_1          \
    PMERGE_A_TI_3               \
    PMERGE_B_TI_3               \
    PMERGE_C_TI_3               \
    PMERGE_D_TI_3               \
    PMERGE_E_TI_3               \
    POC_A_Bossen_3              \
    PPS_A_qualcomm_7            \
    RAP_A_docomo_4              \
    PS_A_VIDYO_3                \
    PS_B_VIDYO_3                \
    RAP_B_Bossen_1              \
    RPLM_A_qualcomm_4           \
    RPLM_B_qualcomm_4           \
    RPS_A_docomo_4              \
    RPS_B_qualcomm_5            \
    RPS_C_ericsson_5            \
    RPS_D_ericsson_6            \
    RPS_E_qualcomm_5            \
    RPS_F_docomo_1              \
    RQT_A_HHI_4                 \
    RQT_B_HHI_4                 \
    RQT_C_HHI_4                 \
    RQT_D_HHI_4                 \
    RQT_E_HHI_4                 \
    RQT_F_HHI_4                 \
    RQT_G_HHI_4                 \
    SAO_A_MediaTek_4            \
    SAO_B_MediaTek_5            \
    SAO_C_Samsung_4             \
    SAO_D_Samsung_4             \
    SAO_E_Canon_4               \
    SAO_F_Canon_3               \
    SAO_G_Canon_3               \
    SDH_A_Orange_3              \
    SLICES_A_Rovi_3             \
    SLIST_A_Sony_4              \
    SLIST_B_Sony_8              \
    SLIST_C_Sony_3              \
    SLIST_D_Sony_9              \
    SLPPLP_A_VIDYO_1            \
    STRUCT_A_Samsung_5          \
    STRUCT_B_Samsung_4          \
    TILES_A_Cisco_2             \
    TILES_B_Cisco_1             \
    TMVP_A_MS_3                 \
    TSCL_A_VIDYO_5              \
    TSCL_B_VIDYO_4              \
    TSKIP_A_MS_3                \
    TUSIZE_A_Samsung_1          \
    VPSID_A_VIDYO_1             \
    WP_A_Toshiba_3              \
    WP_B_Toshiba_3              \
    WPP_A_ericsson_MAIN_2       \
    WPP_B_ericsson_MAIN_2       \
    WPP_C_ericsson_MAIN_2       \
    WPP_D_ericsson_MAIN_2       \
    WPP_E_ericsson_MAIN_2       \
    WPP_F_ericsson_MAIN_2       \

HEVC_SAMPLES_10BIT =            \
    DBLK_A_MAIN10_VIXS_2        \
    WP_A_MAIN10_Toshiba_3       \
    WP_MAIN10_B_Toshiba_3       \
    WPP_A_ericsson_MAIN10_2     \
    WPP_B_ericsson_MAIN10_2     \
    WPP_C_ericsson_MAIN10_2     \
    WPP_D_ericsson_MAIN10_2     \
    WPP_E_ericsson_MAIN10_2     \
    WPP_F_ericsson_MAIN10_2     \

# do not pass:
# DELTAQP_A_BRCM_4.bit -- TODO uses CRC instead of MD5
# HRD_A_Fujitsu_2.bin -- TODO uses hash 2 ("checksum")
# TSUNEQBD_A_MAIN10_Technicolor_2.bit (segfault)

define FATE_HEVC_TEST
FATE_HEVC += fate-hevc-conformance-$(1)
fate-hevc-conformance-$(1): CMD = framecrc -vsync 0 -i $(TARGET_SAMPLES)/hevc-conformance/$(1).bit
endef

define FATE_HEVC_TEST_10BIT
FATE_HEVC += fate-hevc-conformance-$(1)
fate-hevc-conformance-$(1): CMD = framecrc -vsync 0 -i $(TARGET_SAMPLES)/hevc-conformance/$(1).bit -pix_fmt yuv420p10le
endef

$(foreach N,$(HEVC_SAMPLES),$(eval $(call FATE_HEVC_TEST,$(N))))
$(foreach N,$(HEVC_SAMPLES_10BIT),$(eval $(call FATE_HEVC_TEST_10BIT,$(N))))

FATE_HEVC-$(call DEMDEC, HEVC, HEVC) += $(FATE_HEVC)

FATE_SAMPLES_AVCONV += $(FATE_HEVC-yes)

fate-hevc: $(FATE_HEVC-yes)