Merge remote-tracking branch 'newdev/master'

* newdev/master: (33 commits)
  Fix an infinite loop when RoQ encoded generated a frame with a size greater than the maximum valid size.
  Add kbdwin.o to AC3 decoder
  Detect byte-swapped AC-3 and support decoding it directly.
  cosmetics: indentation
  Always copy input data for AC3 decoder.
  ac3enc: make sym_quant() branch-free
  cosmetics: indentation
  Add a CPU flag for the Atom processor.
  id3v2: skip broken tags with invalid size
  id3v2: don't explicitly skip padding
  Make sure kbhit() is in conio.h
  fate: update wmv8-drm reference
  vc1: make P-frame deblock filter bit-exact.
  configure: Add the -D parameter to the dlltool command
  amr: Set the AVFMT_GENERIC_INDEX flag
  amr: Set the pkt->pos field properly to the start of the packet
  amr: Set the codec->bit_rate field based on the last packet
  rtsp: Specify unicast for TCP interleaved streams, too
  Set the correct target for mingw64 dlltool
  applehttp: Change the variable for stream position in seconds into int64_t
  ...

Conflicts:
	ffmpeg.c
	ffplay.c
	libavcodec/ac3dec.c
	libavformat/avio.h
	libavformat/id3v2.c

Merged-by: Michael Niedermayer <michaelni@gmx.at>

1 files changed, 18 insertions, 10 deletions

diff --git a/libavutil/x86/cpu.c b/libavutil/x86/cpu.c
index 14d0fe10c8..2cefdbfbe5 100644
--- a/libavutil/x86/cpu.c
+++ b/libavutil/x86/cpu.c
@@ -135,16 +135,24 @@ int ff_get_cpu_flags_x86(void)
         }
     }
 
-    if (!strncmp(vendor.c, "GenuineIntel", 12) &&
-        family == 6 && (model == 9 || model == 13 || model == 14)) {
-        /* 6/9 (pentium-m "banias"), 6/13 (pentium-m "dothan"), and 6/14 (core1 "yonah")
-         * theoretically support sse2, but it's usually slower than mmx,
-         * so let's just pretend they don't. AV_CPU_FLAG_SSE2 is disabled and
-         * AV_CPU_FLAG_SSE2SLOW is enabled so that SSE2 is not used unless
-         * explicitly enabled by checking AV_CPU_FLAG_SSE2SLOW. The same
-         * situation applies for AV_CPU_FLAG_SSE3 and AV_CPU_FLAG_SSE3SLOW. */
-        if (rval & AV_CPU_FLAG_SSE2) rval ^= AV_CPU_FLAG_SSE2SLOW|AV_CPU_FLAG_SSE2;
-        if (rval & AV_CPU_FLAG_SSE3) rval ^= AV_CPU_FLAG_SSE3SLOW|AV_CPU_FLAG_SSE3;
+    if (!strncmp(vendor.c, "GenuineIntel", 12)) {
+        if (family == 6 && (model == 9 || model == 13 || model == 14)) {
+            /* 6/9 (pentium-m "banias"), 6/13 (pentium-m "dothan"), and 6/14 (core1 "yonah")
+            * theoretically support sse2, but it's usually slower than mmx,
+            * so let's just pretend they don't. AV_CPU_FLAG_SSE2 is disabled and
+            * AV_CPU_FLAG_SSE2SLOW is enabled so that SSE2 is not used unless
+            * explicitly enabled by checking AV_CPU_FLAG_SSE2SLOW. The same
+            * situation applies for AV_CPU_FLAG_SSE3 and AV_CPU_FLAG_SSE3SLOW. */
+            if (rval & AV_CPU_FLAG_SSE2) rval ^= AV_CPU_FLAG_SSE2SLOW|AV_CPU_FLAG_SSE2;
+            if (rval & AV_CPU_FLAG_SSE3) rval ^= AV_CPU_FLAG_SSE3SLOW|AV_CPU_FLAG_SSE3;
+        }
+        /* The Atom processor has SSSE3 support, which is useful in many cases,
+         * but sometimes the SSSE3 version is slower than the SSE2 equivalent
+         * on the Atom, but is generally faster on other processors supporting
+         * SSSE3. This flag allows for selectively disabling certain SSSE3
+         * functions on the Atom. */
+        if (family == 6 && model == 28)
+            rval |= AV_CPU_FLAG_ATOM;
     }
 
     return rval;