diff options
| author | Janne Grunau <janne-libav@jannau.net> | 2014-03-05 12:44:57 +0100 |
|---|---|---|
| committer | Janne Grunau <janne-libav@jannau.net> | 2014-03-06 09:06:39 +0100 |
| commit | fd2fc130b24cd17239ae09ec6de0347340c1b950 (patch) | |
| tree | a3ee3ceb68d9b952199d5f0d5d50469872891127 /libavcodec | |
| parent | 3da4fdd5acdd137660412e3b58433b4693d05e84 (diff) | |
| download | ffmpeg-fd2fc130b24cd17239ae09ec6de0347340c1b950.tar.gz | |
arm: hpeldsp: prevent overreads in armv6 asm
Based on a patch by Russel King <rmk+libav@arm.linux.org.uk>
Bug-Id: 646
CC: libav-stable@libav.org
Diffstat (limited to 'libavcodec')
| -rw-r--r-- | libavcodec/arm/asm.S | 7 | ||||
| -rw-r--r-- | libavcodec/arm/dsputil_armv6.S | 20 |
2 files changed, 19 insertions, 8 deletions
diff --git a/libavcodec/arm/asm.S b/libavcodec/arm/asm.S index 3b495a279f..c9e4fec60f 100644 --- a/libavcodec/arm/asm.S +++ b/libavcodec/arm/asm.S @@ -126,6 +126,13 @@ T ldr \rt, [\rn] T add \rn, \rn, \rm .endm +.macro ldrc_pre cc, rt, rn, rm:vararg +A ldr\cc \rt, [\rn, \rm]! +T itt \cc +T add\cc \rn, \rn, \rm +T ldr\cc \rt, [\rn] +.endm + .macro ldrd_reg rt, rt2, rn, rm A ldrd \rt, \rt2, [\rn, \rm] T add \rt, \rn, \rm diff --git a/libavcodec/arm/dsputil_armv6.S b/libavcodec/arm/dsputil_armv6.S index becf85182d..e4f71cb5b6 100644 --- a/libavcodec/arm/dsputil_armv6.S +++ b/libavcodec/arm/dsputil_armv6.S @@ -134,11 +134,12 @@ function ff_put_pixels8_y2_armv6, export=1 uhadd8 r9, r5, r7 eor r11, r5, r7 and r10, r10, r12 - ldr_pre r4, r1, r2 + ldrc_pre ne, r4, r1, r2 uadd8 r8, r8, r10 and r11, r11, r12 uadd8 r9, r9, r11 - ldr r5, [r1, #4] + it ne + ldrne r5, [r1, #4] uhadd8 r10, r4, r6 eor r6, r4, r6 uhadd8 r11, r5, r7 @@ -146,10 +147,11 @@ function ff_put_pixels8_y2_armv6, export=1 eor r7, r5, r7 uadd8 r10, r10, r6 and r7, r7, r12 - ldr_pre r6, r1, r2 + ldrc_pre ne, r6, r1, r2 uadd8 r11, r11, r7 strd_post r8, r9, r0, r2 - ldr r7, [r1, #4] + it ne + ldrne r7, [r1, #4] strd_post r10, r11, r0, r2 bne 1b @@ -194,13 +196,15 @@ function ff_put_pixels8_y2_no_rnd_armv6, export=1 1: subs r3, r3, #2 uhadd8 r8, r4, r6 - ldr_pre r4, r1, r2 + ldrc_pre ne, r4, r1, r2 uhadd8 r9, r5, r7 - ldr r5, [r1, #4] + it ne + ldrne r5, [r1, #4] uhadd8 r12, r4, r6 - ldr_pre r6, r1, r2 + ldrc_pre ne, r6, r1, r2 uhadd8 r14, r5, r7 - ldr r7, [r1, #4] + it ne + ldrne r7, [r1, #4] stm r0, {r8,r9} add r0, r0, r2 stm r0, {r12,r14} |