diff options
author | Michael Niedermayer <michaelni@gmx.at> | 2011-07-02 03:07:06 +0200 |
---|---|---|
committer | Michael Niedermayer <michaelni@gmx.at> | 2011-07-02 03:24:32 +0200 |
commit | 3074f03a074de3aab79639d261cbd0ccc265b5b4 (patch) | |
tree | 9710041e852ee69f6de6ef6e6333af82f6ca5931 /libavcodec/x86/dsputil_yasm.asm | |
parent | 392acaedcb052fa64386d5d0aea4931386f72d64 (diff) | |
parent | 23ce6e72123a40895baaeefeb27c7c18748bd67e (diff) | |
download | ffmpeg-3074f03a074de3aab79639d261cbd0ccc265b5b4.tar.gz |
Merge remote-tracking branch 'qatar/master'
* qatar/master:
get_bits: remove x86 inline asm in A32 bitstream reader
doc: Remove outdated information about our issue tracker
avidec: Factor out the sync fucntionality.
fate-aac: Expand coverage.
ac3dsp: add x86-optimized versions of ac3dsp.extract_exponents().
ac3dsp: simplify extract_exponents() now that it does not need to do clipping.
ac3enc: clip coefficients after MDCT.
ac3enc: add int32_t array clipping function to DSPUtil, including x86 versions.
swscale: for >8bit scaling, read in native bit-depth.
matroskadec: matroska_read_seek after after EBML_STOP leads to failure.
doxygen: fix usage of @file directive in libavutil/{dict,file}.h
doxygen: Help doxygen parser to understand the DECLARE_ALIGNED and offsetof macros
Conflicts:
doc/issue_tracker.txt
libavformat/avidec.c
libavutil/dict.h
libswscale/swscale.c
libswscale/utils.c
tests/ref/lavfi/pixfmts_scale
Merged-by: Michael Niedermayer <michaelni@gmx.at>
Diffstat (limited to 'libavcodec/x86/dsputil_yasm.asm')
-rw-r--r-- | libavcodec/x86/dsputil_yasm.asm | 115 |
1 files changed, 115 insertions, 0 deletions
diff --git a/libavcodec/x86/dsputil_yasm.asm b/libavcodec/x86/dsputil_yasm.asm index 695aba5ec3..1f5a4f68c7 100644 --- a/libavcodec/x86/dsputil_yasm.asm +++ b/libavcodec/x86/dsputil_yasm.asm @@ -1048,3 +1048,118 @@ emu_edge sse %ifdef ARCH_X86_32 emu_edge mmx %endif + +;----------------------------------------------------------------------------- +; void ff_vector_clip_int32(int32_t *dst, const int32_t *src, int32_t min, +; int32_t max, unsigned int len) +;----------------------------------------------------------------------------- + +%macro PMINSD_MMX 3 ; dst, src, tmp + mova %3, %2 + pcmpgtd %3, %1 + pxor %1, %2 + pand %1, %3 + pxor %1, %2 +%endmacro + +%macro PMAXSD_MMX 3 ; dst, src, tmp + mova %3, %1 + pcmpgtd %3, %2 + pand %1, %3 + pandn %3, %2 + por %1, %3 +%endmacro + +%macro CLIPD_MMX 3-4 ; src/dst, min, max, tmp + PMINSD_MMX %1, %3, %4 + PMAXSD_MMX %1, %2, %4 +%endmacro + +%macro CLIPD_SSE2 3-4 ; src/dst, min (float), max (float), unused + cvtdq2ps %1, %1 + minps %1, %3 + maxps %1, %2 + cvtps2dq %1, %1 +%endmacro + +%macro CLIPD_SSE41 3-4 ; src/dst, min, max, unused + pminsd %1, %3 + pmaxsd %1, %2 +%endmacro + +%macro SPLATD_MMX 1 + punpckldq %1, %1 +%endmacro + +%macro SPLATD_SSE2 1 + pshufd %1, %1, 0 +%endmacro + +%macro VECTOR_CLIP_INT32 4 +cglobal vector_clip_int32_%1, 5,5,%2, dst, src, min, max, len +%ifidn %1, sse2 + cvtsi2ss m4, minm + cvtsi2ss m5, maxm +%else + movd m4, minm + movd m5, maxm +%endif + SPLATD m4 + SPLATD m5 +.loop: +%assign %%i 1 +%rep %3 + mova m0, [srcq+mmsize*0*%%i] + mova m1, [srcq+mmsize*1*%%i] + mova m2, [srcq+mmsize*2*%%i] + mova m3, [srcq+mmsize*3*%%i] +%if %4 + mova m7, [srcq+mmsize*4*%%i] + mova m8, [srcq+mmsize*5*%%i] + mova m9, [srcq+mmsize*6*%%i] + mova m10, [srcq+mmsize*7*%%i] +%endif + CLIPD m0, m4, m5, m6 + CLIPD m1, m4, m5, m6 + CLIPD m2, m4, m5, m6 + CLIPD m3, m4, m5, m6 +%if %4 + CLIPD m7, m4, m5, m6 + CLIPD m8, m4, m5, m6 + CLIPD m9, m4, m5, m6 + CLIPD m10, m4, m5, m6 +%endif + mova [dstq+mmsize*0*%%i], m0 + mova [dstq+mmsize*1*%%i], m1 + mova [dstq+mmsize*2*%%i], m2 + mova [dstq+mmsize*3*%%i], m3 +%if %4 + mova [dstq+mmsize*4*%%i], m7 + mova [dstq+mmsize*5*%%i], m8 + mova [dstq+mmsize*6*%%i], m9 + mova [dstq+mmsize*7*%%i], m10 +%endif +%assign %%i %%i+1 +%endrep + add srcq, mmsize*4*(%3+%4) + add dstq, mmsize*4*(%3+%4) + sub lend, mmsize*(%3+%4) + jg .loop + REP_RET +%endmacro + +INIT_MMX +%define SPLATD SPLATD_MMX +%define CLIPD CLIPD_MMX +VECTOR_CLIP_INT32 mmx, 0, 1, 0 +INIT_XMM +%define SPLATD SPLATD_SSE2 +VECTOR_CLIP_INT32 sse2_int, 6, 1, 0 +%define CLIPD CLIPD_SSE2 +VECTOR_CLIP_INT32 sse2, 6, 2, 0 +%define CLIPD CLIPD_SSE41 +%ifdef m8 +VECTOR_CLIP_INT32 sse41, 11, 1, 1 +%else +VECTOR_CLIP_INT32 sse41, 6, 1, 0 +%endif |