COSMETICS: Remove all trailing whitespace.

Originally committed as revision 4749 to svn://svn.ffmpeg.org/ffmpeg/trunk

1 files changed, 87 insertions, 87 deletions

diff --git a/libavcodec/i386/fdct_mmx.c b/libavcodec/i386/fdct_mmx.c
index 6a13090a13..f3023549a2 100644
--- a/libavcodec/i386/fdct_mmx.c
+++ b/libavcodec/i386/fdct_mmx.c
@@ -5,7 +5,7 @@
  * SSE2 optimization is Copyright (c) 2004 Denes Balatoni.
  *
  * from  fdctam32.c - AP922 MMX(3D-Now) forward-DCT
- * 
+ *
  *  Intel Application Note AP-922 - fast, precise implementation of DCT
  *        http://developer.intel.com/vtune/cbts/appnotes.htm
  *
@@ -51,7 +51,7 @@ static const int64_t fdct_one_corr ATTR_ALIGN(8) = 0x0001000100010001LL;
 
 static const int32_t fdct_r_row[2] ATTR_ALIGN(8) = {RND_FRW_ROW, RND_FRW_ROW };
 
-struct 
+struct
 {
  const int32_t fdct_r_row_sse2[4] ATTR_ALIGN(16);
 } fdct_r_row_sse2 ATTR_ALIGN(16)=
@@ -61,90 +61,90 @@ struct
 //static const long fdct_r_row_sse2[4] ATTR_ALIGN(16) = {RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW, RND_FRW_ROW};
 
 static const int16_t tab_frw_01234567[] ATTR_ALIGN(8) = {  // forward_dct coeff table
-  16384,   16384,   22725,   19266, 
-  16384,   16384,   12873,    4520, 
-  21407,    8867,   19266,   -4520, 
-  -8867,  -21407,  -22725,  -12873, 
-  16384,  -16384,   12873,  -22725, 
- -16384,   16384,    4520,   19266, 
-   8867,  -21407,    4520,  -12873, 
-  21407,   -8867,   19266,  -22725, 
-
-  22725,   22725,   31521,   26722, 
-  22725,   22725,   17855,    6270, 
-  29692,   12299,   26722,   -6270, 
- -12299,  -29692,  -31521,  -17855, 
-  22725,  -22725,   17855,  -31521, 
- -22725,   22725,    6270,   26722, 
-  12299,  -29692,    6270,  -17855, 
-  29692,  -12299,   26722,  -31521, 
-
-  21407,   21407,   29692,   25172, 
-  21407,   21407,   16819,    5906, 
-  27969,   11585,   25172,   -5906, 
- -11585,  -27969,  -29692,  -16819, 
-  21407,  -21407,   16819,  -29692, 
- -21407,   21407,    5906,   25172, 
-  11585,  -27969,    5906,  -16819, 
-  27969,  -11585,   25172,  -29692, 
-
-  19266,   19266,   26722,   22654, 
-  19266,   19266,   15137,    5315, 
-  25172,   10426,   22654,   -5315, 
- -10426,  -25172,  -26722,  -15137, 
-  19266,  -19266,   15137,  -26722, 
- -19266,   19266,    5315,   22654, 
-  10426,  -25172,    5315,  -15137, 
-  25172,  -10426,   22654,  -26722, 
-
-  16384,   16384,   22725,   19266, 
-  16384,   16384,   12873,    4520, 
-  21407,    8867,   19266,   -4520, 
-  -8867,  -21407,  -22725,  -12873, 
-  16384,  -16384,   12873,  -22725, 
- -16384,   16384,    4520,   19266, 
-   8867,  -21407,    4520,  -12873, 
-  21407,   -8867,   19266,  -22725, 
-
-  19266,   19266,   26722,   22654, 
-  19266,   19266,   15137,    5315, 
-  25172,   10426,   22654,   -5315, 
- -10426,  -25172,  -26722,  -15137, 
-  19266,  -19266,   15137,  -26722, 
- -19266,   19266,    5315,   22654, 
-  10426,  -25172,    5315,  -15137, 
-  25172,  -10426,   22654,  -26722, 
-
-  21407,   21407,   29692,   25172, 
-  21407,   21407,   16819,    5906, 
-  27969,   11585,   25172,   -5906, 
- -11585,  -27969,  -29692,  -16819, 
-  21407,  -21407,   16819,  -29692, 
- -21407,   21407,    5906,   25172, 
-  11585,  -27969,    5906,  -16819, 
-  27969,  -11585,   25172,  -29692, 
-
-  22725,   22725,   31521,   26722, 
-  22725,   22725,   17855,    6270, 
-  29692,   12299,   26722,   -6270, 
- -12299,  -29692,  -31521,  -17855, 
-  22725,  -22725,   17855,  -31521, 
- -22725,   22725,    6270,   26722, 
-  12299,  -29692,    6270,  -17855, 
-  29692,  -12299,   26722,  -31521, 
+  16384,   16384,   22725,   19266,
+  16384,   16384,   12873,    4520,
+  21407,    8867,   19266,   -4520,
+  -8867,  -21407,  -22725,  -12873,
+  16384,  -16384,   12873,  -22725,
+ -16384,   16384,    4520,   19266,
+   8867,  -21407,    4520,  -12873,
+  21407,   -8867,   19266,  -22725,
+
+  22725,   22725,   31521,   26722,
+  22725,   22725,   17855,    6270,
+  29692,   12299,   26722,   -6270,
+ -12299,  -29692,  -31521,  -17855,
+  22725,  -22725,   17855,  -31521,
+ -22725,   22725,    6270,   26722,
+  12299,  -29692,    6270,  -17855,
+  29692,  -12299,   26722,  -31521,
+
+  21407,   21407,   29692,   25172,
+  21407,   21407,   16819,    5906,
+  27969,   11585,   25172,   -5906,
+ -11585,  -27969,  -29692,  -16819,
+  21407,  -21407,   16819,  -29692,
+ -21407,   21407,    5906,   25172,
+  11585,  -27969,    5906,  -16819,
+  27969,  -11585,   25172,  -29692,
+
+  19266,   19266,   26722,   22654,
+  19266,   19266,   15137,    5315,
+  25172,   10426,   22654,   -5315,
+ -10426,  -25172,  -26722,  -15137,
+  19266,  -19266,   15137,  -26722,
+ -19266,   19266,    5315,   22654,
+  10426,  -25172,    5315,  -15137,
+  25172,  -10426,   22654,  -26722,
+
+  16384,   16384,   22725,   19266,
+  16384,   16384,   12873,    4520,
+  21407,    8867,   19266,   -4520,
+  -8867,  -21407,  -22725,  -12873,
+  16384,  -16384,   12873,  -22725,
+ -16384,   16384,    4520,   19266,
+   8867,  -21407,    4520,  -12873,
+  21407,   -8867,   19266,  -22725,
+
+  19266,   19266,   26722,   22654,
+  19266,   19266,   15137,    5315,
+  25172,   10426,   22654,   -5315,
+ -10426,  -25172,  -26722,  -15137,
+  19266,  -19266,   15137,  -26722,
+ -19266,   19266,    5315,   22654,
+  10426,  -25172,    5315,  -15137,
+  25172,  -10426,   22654,  -26722,
+
+  21407,   21407,   29692,   25172,
+  21407,   21407,   16819,    5906,
+  27969,   11585,   25172,   -5906,
+ -11585,  -27969,  -29692,  -16819,
+  21407,  -21407,   16819,  -29692,
+ -21407,   21407,    5906,   25172,
+  11585,  -27969,    5906,  -16819,
+  27969,  -11585,   25172,  -29692,
+
+  22725,   22725,   31521,   26722,
+  22725,   22725,   17855,    6270,
+  29692,   12299,   26722,   -6270,
+ -12299,  -29692,  -31521,  -17855,
+  22725,  -22725,   17855,  -31521,
+ -22725,   22725,    6270,   26722,
+  12299,  -29692,    6270,  -17855,
+  29692,  -12299,   26722,  -31521,
 };
 
-struct 
+struct
 {
  const int16_t tab_frw_01234567_sse2[256] ATTR_ALIGN(16);
 } tab_frw_01234567_sse2 ATTR_ALIGN(16) =
 {{
-//static const int16_t tab_frw_01234567_sse2[] ATTR_ALIGN(16) = {  // forward_dct coeff table  
+//static const int16_t tab_frw_01234567_sse2[] ATTR_ALIGN(16) = {  // forward_dct coeff table
 #define TABLE_SSE2 C4,  C4,  C1,  C3, -C6, -C2, -C1, -C5, \
                    C4,  C4,  C5,  C7,  C2,  C6,  C3, -C7, \
                   -C4,  C4,  C7,  C3,  C6, -C2,  C7, -C5, \
-                   C4, -C4,  C5, -C1,  C2, -C6,  C3, -C1, 
-// c1..c7 * cos(pi/4) * 2^15 
+                   C4, -C4,  C5, -C1,  C2, -C6,  C3, -C1,
+// c1..c7 * cos(pi/4) * 2^15
 #define C1 22725
 #define C2 21407
 #define C3 19266
@@ -355,17 +355,17 @@ static always_inline void fdct_row_sse2(const int16_t *in, int16_t *out)
 	"movq      \\i(%0), %%xmm2     \n\t"
 	"movq      \\i+8(%0), %%xmm0   \n\t"
 	"movdqa    \\t+32(%1), %%xmm3  \n\t"
-	"movdqa    \\t+48(%1), %%xmm7  \n\t"	
+	"movdqa    \\t+48(%1), %%xmm7  \n\t"
 	"movdqa    \\t(%1), %%xmm4     \n\t"
-	"movdqa    \\t+16(%1), %%xmm5  \n\t"	
+	"movdqa    \\t+16(%1), %%xmm5  \n\t"
 	".endm                         \n\t"
         ".macro FDCT_ROW_SSE2_H2 i t   \n\t"
 	"movq      \\i(%0), %%xmm2     \n\t"
 	"movq      \\i+8(%0), %%xmm0   \n\t"
 	"movdqa    \\t+32(%1), %%xmm3  \n\t"
-	"movdqa    \\t+48(%1), %%xmm7  \n\t"	
+	"movdqa    \\t+48(%1), %%xmm7  \n\t"
 	".endm                         \n\t"
-	".macro FDCT_ROW_SSE2 i        \n\t"	
+	".macro FDCT_ROW_SSE2 i        \n\t"
 	"movq      %%xmm2, %%xmm1      \n\t"
 	"pshuflw   $27, %%xmm0, %%xmm0 \n\t"
 	"paddsw    %%xmm0, %%xmm1      \n\t"
@@ -376,7 +376,7 @@ static always_inline void fdct_row_sse2(const int16_t *in, int16_t *out)
 	"pmaddwd   %%xmm1, %%xmm7      \n\t"
 	"pmaddwd   %%xmm5, %%xmm2      \n\t"
 	"pmaddwd   %%xmm4, %%xmm1      \n\t"
-	"paddd     %%xmm7, %%xmm3      \n\t"	
+	"paddd     %%xmm7, %%xmm3      \n\t"
 	"paddd     %%xmm2, %%xmm1      \n\t"
 	"paddd     %%xmm6, %%xmm3      \n\t"
 	"paddd     %%xmm6, %%xmm1      \n\t"
@@ -384,8 +384,8 @@ static always_inline void fdct_row_sse2(const int16_t *in, int16_t *out)
 	"psrad     %3, %%xmm1          \n\t"
 	"packssdw  %%xmm3, %%xmm1      \n\t"
 	"movdqa    %%xmm1, \\i(%4)     \n\t"
-	".endm                         \n\t"	
-	"movdqa    (%2), %%xmm6        \n\t"		
+	".endm                         \n\t"
+	"movdqa    (%2), %%xmm6        \n\t"
 	"FDCT_ROW_SSE2_H1 0 0 \n\t"
 	"FDCT_ROW_SSE2 0 \n\t"
 	"FDCT_ROW_SSE2_H2 64 0 \n\t"
@@ -411,7 +411,7 @@ static always_inline void fdct_row_sse2(const int16_t *in, int16_t *out)
 }
 
 static always_inline void fdct_row_mmx2(const int16_t *in, int16_t *out, const int16_t *table)
-{ 
+{
     pshufw_m2r(*(in + 4), mm5, 0x1B);
     movq_m2r(*(in + 0), mm0);
     movq_r2r(mm0, mm1);
@@ -454,7 +454,7 @@ static always_inline void fdct_row_mmx2(const int16_t *in, int16_t *out, const i
 }
 
 static always_inline void fdct_row_mmx(const int16_t *in, int16_t *out, const int16_t *table)
-{ 
+{
 //FIXME reorder (i dont have a old mmx only cpu here to benchmark ...)
     movd_m2r(*(in + 6), mm1);
     punpcklwd_m2r(*(in + 4), mm1);
@@ -547,7 +547,7 @@ void ff_fdct_mmx2(int16_t *block)
     }
 }
 
-void ff_fdct_sse2(int16_t *block) 
+void ff_fdct_sse2(int16_t *block)
 {
     int64_t align_tmp[16] ATTR_ALIGN(8);
     int16_t * const block_tmp= (int16_t*)align_tmp;