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| author | ZhouXiaoyong <zhouxiaoyong@loongson.cn> | 2016-05-13 18:03:27 +0800 |
|---|---|---|
| committer | Michael Niedermayer <michael@niedermayer.cc> | 2016-05-17 04:18:42 +0200 |
| commit | af3e944e7edd0c89c66130a4c30dc3700e6c0950 (patch) | |
| tree | 1d4462eb34c1f49867440857c55916e5532809af /libavcodec/arm/vc1dsp_init_arm.c | |
| parent | 60c2e38dcbe4656bccf08bc70822e06007e555c2 (diff) | |
| download | ffmpeg-af3e944e7edd0c89c66130a4c30dc3700e6c0950.tar.gz | |
avcodec/mips/h264dsp_mmi: Version 2 of the optimizations for loongson mmi
1. no longer use the register names directly and optimized code format
2. to be compatible with O32, specify type of address variable with mips_reg and handle the address variable with PTR_ operator
3. optimize some unaligned loads and stores
4. use uld and mtc1 to workaround cpu 3A2000 gslwlc1 bug (gslwlc1 instruction extension bug in O32 ABI)
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
Diffstat (limited to 'libavcodec/arm/vc1dsp_init_arm.c')
0 files changed, 0 insertions, 0 deletions