diff options
| author | Vicente Olivert Riera <Vincent.Riera@imgtec.com> | 2015-12-03 13:22:24 +0000 |
|---|---|---|
| committer | Michael Niedermayer <michael@niedermayer.cc> | 2015-12-30 20:21:45 +0100 |
| commit | 6a7e94cb14f31013261c337e217ca38c37fd9efd (patch) | |
| tree | 9c01f180f3228c8511d3898f01ab097c4132d508 /configure | |
| parent | 389ce22b5f093e9eff3dc11ab7dd72fd12dcc17c (diff) | |
| download | ffmpeg-6a7e94cb14f31013261c337e217ca38c37fd9efd.tar.gz | |
mips: add mips32r6 architecture variant
Signed-off-by: Vicente Olivert Riera <Vincent.Riera@imgtec.com>
Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
Diffstat (limited to 'configure')
| -rwxr-xr-x | configure | 12 |
1 files changed, 12 insertions, 0 deletions
@@ -1666,6 +1666,7 @@ ARCH_EXT_LIST_MIPS=" mipsfpu mips32r2 mips64r2 + mips32r6 mips64r6 mipsdsp mipsdspr2 @@ -2155,6 +2156,7 @@ mipsfpu_deps="mips" mipsdsp_deps="mips" mipsdspr2_deps="mips" mips32r2_deps="mips" +mips32r6_deps="mips" mips64r2_deps="mips" mips64r6_deps="mips" msa_deps="mips" @@ -4130,6 +4132,7 @@ elif enabled mips; then case $cpu in 24kc) + disable mips32r6 disable mips64r2 disable mips64r6 disable mipsfpu @@ -4138,6 +4141,7 @@ elif enabled mips; then disable msa ;; 24kf*) + disable mips32r6 disable mips64r2 disable mips64r6 disable mipsdsp @@ -4145,6 +4149,7 @@ elif enabled mips; then disable msa ;; 24kec|34kc|1004kc) + disable mips32r6 disable mips64r2 disable mips64r6 disable mipsfpu @@ -4152,23 +4157,27 @@ elif enabled mips; then disable msa ;; 24kef*|34kf*|1004kf*) + disable mips32r6 disable mips64r2 disable mips64r6 disable mipsdspr2 disable msa ;; 74kc) + disable mips32r6 disable mips64r2 disable mips64r6 disable mipsfpu disable msa ;; 74kf) + disable mips32r6 disable mips64r2 disable mips64r6 disable msa ;; p5600) + disable mips32r6 disable mips64r2 disable mips64r6 disable mipsdsp @@ -4179,6 +4188,7 @@ elif enabled mips; then ;; i6400) disable mips32r2 + disable mips32r6 disable mips64r2 disable mipsdsp disable mipsdspr2 @@ -4190,6 +4200,7 @@ elif enabled mips; then loongson*) disable mipsfpu disable mips32r2 + disable mips32r6 disable mips64r2 disable mips64r6 disable mipsdsp @@ -4221,6 +4232,7 @@ elif enabled mips; then *) disable mipsfpu disable mips32r2 + disable mips32r6 disable mips64r2 disable mips64r6 disable mipsdsp |