configure, mips: remove MIPS32R2, merging it with MIPSFPU

There are no independant uses of mips32r2 instructions except for the
FPU parts. Due to the heavy use of mips32r2 specifc fpu extensions, I
am guessing the original author intended MIPSFPU to imply MIPS32R2 anyway.

Since these fpu instructions are available on mips64 (non-r2), enable them
there as well.

Also remove the last occurence of HAVE_MIPS32R2 (which is coupled to
HAVE_MIPSFPU anyway).

mips32r2 is left in the list of options form compatability so that using
--disable-mips32r2 doesn't break anything.

Signed-off-by: James Cowgill <james410@cowgill.org.uk>
Signed-off-by: Michael Niedermayer <michaelni@gmx.at>

4 files changed, 16 insertions, 9 deletions

diff --git a/Makefile b/Makefile
index 845a274953..ca2ce59e25 100644
--- a/Makefile
+++ b/Makefile
@@ -80,7 +80,7 @@ SUBDIR_VARS := CLEANFILES EXAMPLES FFLIBS HOSTPROGS TESTPROGS TOOLS      \
                HEADERS ARCH_HEADERS BUILT_HEADERS SKIPHEADERS            \
                ARMV5TE-OBJS ARMV6-OBJS ARMV8-OBJS VFP-OBJS NEON-OBJS     \
                ALTIVEC-OBJS MMX-OBJS YASM-OBJS                           \
-               MIPSFPU-OBJS MIPSDSPR2-OBJS MIPSDSPR1-OBJS MIPS32R2-OBJS  \
+               MIPSFPU-OBJS MIPSDSPR2-OBJS MIPSDSPR1-OBJS                \
                OBJS SLIBOBJS HOSTOBJS TESTOBJS
 
 define RESET
diff --git a/arch.mak b/arch.mak
index 0e866d8628..48bc2d3241 100644
--- a/arch.mak
+++ b/arch.mak
@@ -5,7 +5,6 @@ OBJS-$(HAVE_VFP)     += $(VFP-OBJS)     $(VFP-OBJS-yes)
 OBJS-$(HAVE_NEON)    += $(NEON-OBJS)    $(NEON-OBJS-yes)
 
 OBJS-$(HAVE_MIPSFPU)   += $(MIPSFPU-OBJS)    $(MIPSFPU-OBJS-yes)
-OBJS-$(HAVE_MIPS32R2)  += $(MIPS32R2-OBJS)   $(MIPS32R2-OBJS-yes)
 OBJS-$(HAVE_MIPSDSPR1) += $(MIPSDSPR1-OBJS)  $(MIPSDSPR1-OBJS-yes)
 OBJS-$(HAVE_MIPSDSPR2) += $(MIPSDSPR2-OBJS)  $(MIPSDSPR2-OBJS-yes)
 
diff --git a/configure b/configure
index d641d9f658..ce745d21e4 100755
--- a/configure
+++ b/configure
@@ -358,7 +358,6 @@ Optimization options (experts only):
   --disable-neon           disable NEON optimizations
   --disable-inline-asm     disable use of inline assembly
   --disable-yasm           disable use of nasm/yasm assembly
-  --disable-mips32r2       disable MIPS32R2 optimizations
   --disable-mipsdspr1      disable MIPS DSP ASE R1 optimizations
   --disable-mipsdspr2      disable MIPS DSP ASE R2 optimizations
   --disable-mipsfpu        disable floating point MIPS optimizations
@@ -1999,7 +1998,6 @@ setend_deps="arm"
 map 'eval ${v}_inline_deps=inline_asm' $ARCH_EXT_LIST_ARM
 
 mipsfpu_deps="mips"
-mips32r2_deps="mips"
 mipsdspr1_deps="mips"
 mipsdspr2_deps="mips"
 
@@ -4569,8 +4567,19 @@ EOF
 elif enabled mips; then
 
     check_inline_asm loongson '"dmult.g $1, $2, $3"'
-    enabled mips32r2  && add_cflags "-mips32r2" && add_asflags "-mips32r2" &&
-     check_inline_asm mips32r2  '"rotr $t0, $t1, 1"'
+
+    # Enable minimum ISA based on selected options
+    if enabled mips64 && (enabled mipsdspr1 || enabled mipsdspr2); then
+        add_cflags "-mips64r2"
+        add_asflags "-mips64r2"
+    elif enabled mips64 && enabled mipsfpu; then
+        add_cflags "-mips64"
+        add_asflags "-mips64"
+    elif enabled mipsfpu || enabled mipsdspr1 || enabled mipsdspr2; then
+        add_cflags "-mips32r2"
+        add_asflags "-mips32r2"
+    fi
+
     enabled mipsdspr1 && add_cflags "-mdsp" && add_asflags "-mdsp" &&
      check_inline_asm mipsdspr1 '"addu.qb $t0, $t1, $t2"'
     enabled mipsdspr2 && add_cflags "-mdspr2" && add_asflags "-mdspr2" &&
@@ -5522,7 +5531,6 @@ if enabled arm; then
 fi
 if enabled mips; then
     echo "MIPS FPU enabled          ${mipsfpu-no}"
-    echo "MIPS32R2 enabled          ${mips32r2-no}"
     echo "MIPS DSP R1 enabled       ${mipsdspr1-no}"
     echo "MIPS DSP R2 enabled       ${mipsdspr2-no}"
 fi
diff --git a/libavcodec/mips/ac3dsp_mips.c b/libavcodec/mips/ac3dsp_mips.c
index f33c6f1809..bd2a611627 100644
--- a/libavcodec/mips/ac3dsp_mips.c
+++ b/libavcodec/mips/ac3dsp_mips.c
@@ -199,7 +199,7 @@ static void ac3_update_bap_counts_mips(uint16_t mant_cnt[16], uint8_t *bap,
 }
 #endif
 
-#if HAVE_MIPSFPU && HAVE_MIPS32R2
+#if HAVE_MIPSFPU
 static void float_to_fixed24_mips(int32_t *dst, const float *src, unsigned int len)
 {
     const float scale = 1 << 24;
@@ -403,7 +403,7 @@ void ff_ac3dsp_init_mips(AC3DSPContext *c, int bit_exact) {
     c->bit_alloc_calc_bap = ac3_bit_alloc_calc_bap_mips;
     c->update_bap_counts  = ac3_update_bap_counts_mips;
 #endif
-#if HAVE_MIPSFPU && HAVE_MIPS32R2
+#if HAVE_MIPSFPU
     c->float_to_fixed24 = float_to_fixed24_mips;
     c->downmix          = ac3_downmix_mips;
 #endif